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Message-ID: <20250507231644.GB28763@ranerica-svr.sc.intel.com>
Date: Wed, 7 May 2025 16:16:45 -0700
From: Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>
To: Krzysztof Kozlowski <krzk@...nel.org>
Cc: x86@...nel.org, Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>, Rob Herring <robh@...nel.org>,
	"K. Y. Srinivasan" <kys@...rosoft.com>,
	Haiyang Zhang <haiyangz@...rosoft.com>,
	Wei Liu <wei.liu@...nel.org>, Dexuan Cui <decui@...rosoft.com>,
	Michael Kelley <mhklinux@...look.com>, devicetree@...r.kernel.org,
	Saurabh Sengar <ssengar@...ux.microsoft.com>,
	Chris Oo <cho@...rosoft.com>, linux-hyperv@...r.kernel.org,
	"Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
	linux-acpi@...r.kernel.org, linux-kernel@...r.kernel.org,
	"Ravi V. Shankar" <ravi.v.shankar@...el.com>,
	Ricardo Neri <ricardo.neri@...el.com>
Subject: Re: [PATCH v3 04/13] dt-bindings: x86: Add CPU bindings for x86

On Tue, May 06, 2025 at 09:25:59AM +0200, Krzysztof Kozlowski wrote:
> On Mon, May 05, 2025 at 09:52:35PM GMT, Ricardo Neri wrote:
> > On Sun, May 04, 2025 at 06:45:59PM +0200, Krzysztof Kozlowski wrote:
> > > On Sat, May 03, 2025 at 12:15:06PM GMT, Ricardo Neri wrote:
> > > > Add bindings for CPUs in x86 architecture. Start by defining the `reg` and
> > > 
> > > What for?
> > 
> > Thank you for your quick feedback, Krzysztof!
> > 
> > Do you mean for what reason I want to start bindings for x86 CPUs? Or only
> 
> Yes. For which devices, what purpose.

Sure, I could expand on this.

> 
> > the `reg` property? If the former, it is to add an enable-method property to
> > x86 CPUs. If the latter, is to show the relationship between APIC and `reg`.
> > 
> > > 
> > > > `enable-method` properties and their relationship to x86 APIC ID and the
> > > > available mechanisms to boot secondary CPUs.
> > > > 
> > > > Start defining bindings for Intel processors. Bindings for other vendors
> > > > can be added later as needed.
> > > > 
> > > > Signed-off-by: Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>
> > > > ---
> > > 
> > > Not really tested so only limited review follows.
> > 
> > Sorry, I ran make dt_binding_check but only on this schema. I missed the
> > reported error.
> > 
> > > 
> > > >  .../devicetree/bindings/x86/cpus.yaml         | 80 +++++++++++++++++++
> > > >  1 file changed, 80 insertions(+)
> > > >  create mode 100644 Documentation/devicetree/bindings/x86/cpus.yaml
> > > > 
> > > > diff --git a/Documentation/devicetree/bindings/x86/cpus.yaml b/Documentation/devicetree/bindings/x86/cpus.yaml
> > > > new file mode 100644
> > > > index 000000000000..108b3ad64aea
> > > > --- /dev/null
> > > > +++ b/Documentation/devicetree/bindings/x86/cpus.yaml
> > > > @@ -0,0 +1,80 @@
> > > > +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
> > > > +%YAML 1.2
> > > > +---
> > > > +$id: http://devicetree.org/schemas/x86/cpus.yaml#
> > > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > > +
> > > > +title: x86 CPUs
> > > > +
> > > > +maintainers:
> > > > +  - Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>
> > > > +
> > > > +description: |
> > > > +  Description of x86 CPUs in a system through the "cpus" node.
> > > > +
> > > > +  Detailed information about the CPU architecture can be found in the Intel
> > > > +  Software Developer's Manual:
> > > > +    https://intel.com/sdm
> > > > +
> > > > +properties:
> > > > +  compatible:
> > > > +    enum:
> > > > +      - intel,x86
> > > 
> > > That's architecture, not a CPU. CPUs are like 80286, 80386, so that's
> > > not even specific instruction set. I don't get what you need it for.
> > 
> > Am I to understand the the `compatible` property is not needed if the
> > bindings apply to any x86 CPU?
> 
> Every device needs compatible. Its meaning is explained:
> https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#compatible
> 
> If you add here a device representing CPU, then look at existing
> bindings for CPUs how they do it.
> 
> It again feels like you add DT for platform which is not a real thing.

That is correct. I struggle to enumerate specific CPUs because the `intel,
wakeup-mailbox` enable method is implemented in the platform firmware and
is not tied to a given processor model as required by the rules of the
`compatible` property.

> If you use DT, you do not get different rules, therefore read all
> standard guides and tutorials (there were many, quite comprehensive).

I went through various materials. Perhaps I needed to understand the rules
better.

I realize now the DeviceTree is about describing hardware not firmware and
DT bindings are a suitable vehicle for this.

Thanks for the time you spent reviewing this patchset!

BR,
Ricardo

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