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Message-ID: <174659505814.5380.17400921825631529392.b4-ty@kernel.org>
Date: Tue,  6 May 2025 22:18:08 -0700
From: Bjorn Andersson <andersson@...nel.org>
To: Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...nel.org>,
	Konrad Dybcio <konradybcio@...nel.org>,
	AngeloGioacchino Del Regno <angelogioacchino.delregno@...ainline.org>,
	Luca Weiss <luca.weiss@...rphone.com>
Cc: ~postmarketos/upstreaming@...ts.sr.ht,
	phone-devel@...r.kernel.org,
	linux-arm-msm@...r.kernel.org,
	linux-clk@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/4] Add *_wait_val values for GDSCs in all SM6350 clock drivers


On Fri, 25 Apr 2025 14:12:54 +0200, Luca Weiss wrote:
> As described in the commit messages, keep the GDSC configs aligned with
> the downstream kernel.
> 
> For reference, this was checked using the following code:
> 
> To: Bjorn Andersson <andersson@...nel.org>
> To: Michael Turquette <mturquette@...libre.com>
> To: Stephen Boyd <sboyd@...nel.org>
> To: Konrad Dybcio <konradybcio@...nel.org>
> To: AngeloGioacchino Del Regno <angelogioacchino.delregno@...ainline.org>
> Cc: ~postmarketos/upstreaming@...ts.sr.ht
> Cc: phone-devel@...r.kernel.org
> Cc: linux-arm-msm@...r.kernel.org
> Cc: linux-clk@...r.kernel.org
> Cc: linux-kernel@...r.kernel.org
> 
> [...]

Applied, thanks!

[0/4] Add *_wait_val values for GDSCs in all SM6350 clock drivers
      (no commit info)
[1/4] clk: qcom: camcc-sm6350: Add *_wait_val values for GDSCs
      commit: e7b1c13280ad866f3b935f6c658713c41db61635
[2/4] clk: qcom: dispcc-sm6350: Add *_wait_val values for GDSCs
      commit: 673989d27123618afab56df1143a75454178b4ae
[3/4] clk: qcom: gcc-sm6350: Add *_wait_val values for GDSCs
      commit: afdfd829a99e467869e3ca1955fb6c6e337c340a
[4/4] clk: qcom: gpucc-sm6350: Add *_wait_val values for GDSCs
      commit: d988b0b866c2aeb23aa74022b5bbd463165a7a33

Best regards,
-- 
Bjorn Andersson <andersson@...nel.org>

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