lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <BN9PR11MB5276295092F09A70EFC388DF8C88A@BN9PR11MB5276.namprd11.prod.outlook.com>
Date: Wed, 7 May 2025 08:00:05 +0000
From: "Tian, Kevin" <kevin.tian@...el.com>
To: Vasant Hegde <vasant.hegde@....com>, Jason Gunthorpe <jgg@...dia.com>
CC: Nicolin Chen <nicolinc@...dia.com>, "corbet@....net" <corbet@....net>,
	"will@...nel.org" <will@...nel.org>, "bagasdotme@...il.com"
	<bagasdotme@...il.com>, "robin.murphy@....com" <robin.murphy@....com>,
	"joro@...tes.org" <joro@...tes.org>, "thierry.reding@...il.com"
	<thierry.reding@...il.com>, "vdumpa@...dia.com" <vdumpa@...dia.com>,
	"jonathanh@...dia.com" <jonathanh@...dia.com>, "shuah@...nel.org"
	<shuah@...nel.org>, "jsnitsel@...hat.com" <jsnitsel@...hat.com>,
	"nathan@...nel.org" <nathan@...nel.org>, "peterz@...radead.org"
	<peterz@...radead.org>, "Liu, Yi L" <yi.l.liu@...el.com>,
	"mshavit@...gle.com" <mshavit@...gle.com>, "praan@...gle.com"
	<praan@...gle.com>, "zhangzekun11@...wei.com" <zhangzekun11@...wei.com>,
	"iommu@...ts.linux.dev" <iommu@...ts.linux.dev>, "linux-doc@...r.kernel.org"
	<linux-doc@...r.kernel.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, "linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "linux-tegra@...r.kernel.org"
	<linux-tegra@...r.kernel.org>, "linux-kselftest@...r.kernel.org"
	<linux-kselftest@...r.kernel.org>, "patches@...ts.linux.dev"
	<patches@...ts.linux.dev>, "mochs@...dia.com" <mochs@...dia.com>,
	"alok.a.tiwari@...cle.com" <alok.a.tiwari@...cle.com>, Suravee Suthikulpanit
	<suravee.suthikulpanit@....com>
Subject: RE: [PATCH v3 11/23] iommufd/viommu: Add IOMMUFD_CMD_VQUEUE_ALLOC
 ioctl

> From: Vasant Hegde <vasant.hegde@....com>
> Sent: Wednesday, May 7, 2025 3:42 PM
> 
> Hi Jason,
> 
> 
> On 5/6/2025 5:31 PM, Jason Gunthorpe wrote:
> > Do you need a modify queue operation?
> 
> We have two types of operations. One that impacts the queue, other set of
> bits
> which doesn't operate on qeueue.
> 
> ex: Event log buffer
>   - We configure "MMIO Offset 0010h Event Log Base Address Register" with
> Base
> address and size
> 
>   -  MMIO Offset 0018h IOMMU Control Register
>      EventLogEn: Event log enable
>        * When guest sets this bit, qemu will trap and will send queue_alloc
>        * When guest disables this bit, qemu will trap and send vqueue_destroy
> 
>      This part is fine.
> 
>      EventIntEn: Event log interrupt enable
>        * When guest sets this bit, qemu will trap
>        * this needs to be communicated to Host so that we can program VF
> Control
> BAR and enable the interrupt
> 
>   - There is other bit "Completion wait interrupt enable"
>     This doesn't related to any buffer. Instead if we configure this for
> completion wait command it will generate interrupt.
> 
> I am asking how do we handle above two steps? Should it be part of queue
> IOCTL
> or may be some other IOCTL which just passes these info to HW driver?
> 

Probably IOMMUFD_CMD_OPTION can server the purpose? 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ