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Message-ID: <71bca969-3423-46b8-ad69-838fa70b70fc@quicinc.com>
Date: Wed, 7 May 2025 18:07:40 +0800
From: Qiang Yu <quic_qianyu@...cinc.com>
To: Krzysztof Kozlowski <krzk@...nel.org>,
Ziyue Zhang
<quic_ziyuzhan@...cinc.com>
CC: <vkoul@...nel.org>, <kishon@...nel.org>, <robh@...nel.org>,
<krzk+dt@...nel.org>, <conor+dt@...nel.org>,
<dmitry.baryshkov@...aro.org>, <neil.armstrong@...aro.org>,
<abel.vesa@...aro.org>, <manivannan.sadhasivam@...aro.org>,
<lpieralisi@...nel.org>, <kw@...ux.com>, <bhelgaas@...gle.com>,
<andersson@...nel.org>, <konradybcio@...nel.org>,
<linux-phy@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-arm-msm@...r.kernel.org>,
<linux-pci@...r.kernel.org>, <quic_krichai@...cinc.com>,
<quic_vbadigan@...cinc.com>
Subject: Re: [PATCH v5 2/6] dt-bindings: PCI: qcom,pcie-sa8775p: document
qcs8300
On 5/7/2025 6:03 PM, Krzysztof Kozlowski wrote:
> On 07/05/2025 11:56, Qiang Yu wrote:
>> On 5/7/2025 4:25 PM, Krzysztof Kozlowski wrote:
>>> On 07/05/2025 10:19, Ziyue Zhang wrote:
>>>> On 5/7/2025 1:10 PM, Krzysztof Kozlowski wrote:
>>>>> On Wed, May 07, 2025 at 11:10:15AM GMT, Ziyue Zhang wrote:
>>>>>> Add compatible for qcs8300 platform, with sa8775p as the fallback.
>>>>>>
>>>>>> Signed-off-by: Ziyue Zhang <quic_ziyuzhan@...cinc.com>
>>>>>> ---
>>>>>> .../bindings/pci/qcom,pcie-sa8775p.yaml | 26 ++++++++++++++-----
>>>>>> 1 file changed, 19 insertions(+), 7 deletions(-)
>>>>>>
>>>>>> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml
>>>>>> index efde49d1bef8..154bb60be402 100644
>>>>>> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml
>>>>>> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml
>>>>>> @@ -16,7 +16,12 @@ description:
>>>>>>
>>>>>> properties:
>>>>>> compatible:
>>>>>> - const: qcom,pcie-sa8775p
>>>>>> + oneOf:
>>>>>> + - const: qcom,pcie-sa8775p
>>>>>> + - items:
>>>>>> + - enum:
>>>>>> + - qcom,pcie-qcs8300
>>>>>> + - const: qcom,pcie-sa8775p
>>>>>>
>>>>>> reg:
>>>>>> minItems: 6
>>>>>> @@ -45,7 +50,7 @@ properties:
>>>>>>
>>>>>> interrupts:
>>>>>> minItems: 8
>>>>>> - maxItems: 8
>>>>>> + maxItems: 9
>>>>> I don't understand why this is flexible for sa8775p. I assume this
>>>>> wasn't tested or finished, just like your previous patch suggested.
>>>>>
>>>>> Please send complete bindings once you finish them or explain what
>>>>> exactly changed in the meantime.
>>>>>
>>>>> Best regards,
>>>>> Krzysztof
>>>> Hi Krzysztof
>>>> Global interrupt is optional in the PCIe driver. It is not present in
>>>> the SA8775p PCIe device tree node, but it is required for the QCS8300
>>> And hardware?
>> The PCIe controller on the SA8775p is also capable of generating a global
>> interrupt.
>>>> I did the DTBs and yaml checks before pushing this patch. This is how
>>>> I became aware that `maxItem` needed to be changed to 9.
>>> If it is required for QCS8300, then you are supposed to make it required
>>> in the binding for this device. Look at other bindings.
>> The global interrupt is not mandatory. The PCIe driver can still function
>> without this interrupt, but it will offer a better user experience when
>> the device is plugged in or removed. On other platforms, the global
>> interrupt is also optional, and `minItems` and `maxItems` are set to 8 and
>> 9 respectively. Please refer to `qcom,pcie - sm8550.yaml`,
>> `qcom,pcie - sm8450.yaml`, and `qcom,pcie - x1e80100.yaml`.
> I don't know what does it prove. You cannot add requirement of global
> interrupt to existing devices because it would be an ABI break.
IIUC, this will not break ABI because pcie_qcom.c parses this irq using
"irq = platform_get_irq_byname_optional(pdev, "global");"
>
> Best regards,
> Krzysztof
--
With best wishes
Qiang Yu
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