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Message-Id: <20250508-topic-ubwc_central-v1-13-035c4c5cbe50@oss.qualcomm.com>
Date: Thu, 08 May 2025 20:12:45 +0200
From: Konrad Dybcio <konradybcio@...nel.org>
To: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Clark <robdclark@...il.com>,
Abhinav Kumar <quic_abhinavk@...cinc.com>,
Dmitry Baryshkov <lumag@...nel.org>,
Akhil P Oommen <quic_akhilpo@...cinc.com>, Sean Paul <sean@...rly.run>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>
Cc: Marijn Suijten <marijn.suijten@...ainline.org>,
linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
dri-devel@...ts.freedesktop.org, freedreno@...ts.freedesktop.org,
Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Subject: [PATCH RFT 13/14] drm/msm/a6xx: Drop cfg->ubwc_swizzle override
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
On A663 (SA8775P) the value matches exactly.
On A610, the value matches on SM6115, but is different on SM6125. That
turns out not to be a problem, as the bits that differ aren't even
interpreted.
Signed-off-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 9 ++-------
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index 28ba0cddd7d222b0a287c7c3a111e123a73b1d39..d96f8cec854a36a77896d39b88c320c29c787edd 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -597,13 +597,10 @@ static int a6xx_calc_ubwc_config(struct adreno_gpu *gpu)
*cfg = *common_cfg;
- cfg->ubwc_swizzle = 0x6;
cfg->highest_bank_bit = 2;
- if (adreno_is_a610(gpu)) {
+ if (adreno_is_a610(gpu))
cfg->highest_bank_bit = 0;
- cfg->ubwc_swizzle = 0x7;
- }
if (adreno_is_a618(gpu))
cfg->highest_bank_bit = 1;
@@ -630,10 +627,8 @@ static int a6xx_calc_ubwc_config(struct adreno_gpu *gpu)
cfg->highest_bank_bit = 3;
}
- if (adreno_is_a663(gpu)) {
+ if (adreno_is_a663(gpu))
cfg->highest_bank_bit = 0;
- cfg->ubwc_swizzle = 0x4;
- }
if (adreno_is_7c3(gpu))
cfg->highest_bank_bit = 1;
--
2.49.0
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