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Message-ID: <aBxpMuFGKgWrw1TV@hovoldconsulting.com>
Date: Thu, 8 May 2025 10:20:02 +0200
From: Johan Hovold <johan@...nel.org>
To: Wenbin Yao <quic_wenbyao@...cinc.com>
Cc: catalin.marinas@....com, will@...nel.org,
linux-arm-kernel@...ts.infradead.org, andersson@...nel.org,
konradybcio@...nel.org, robh@...nel.org, krzk+dt@...nel.org,
conor+dt@...nel.org, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
vkoul@...nel.org, kishon@...nel.org, sfr@...b.auug.org.au,
linux-phy@...ts.infradead.org, krishna.chundru@....qualcomm.com,
quic_vbadigan@...cinc.com, quic_mrana@...cinc.com,
quic_cang@...cinc.com, quic_qianyu@...cinc.com,
Johan Hovold <johan+linaro@...nel.org>,
Abel Vesa <abel.vesa@...aro.org>
Subject: Re: [PATCH v3 5/5] phy: qcom: qmp-pcie: add x1e80100 qref supplies
On Thu, May 08, 2025 at 04:15:14PM +0800, Wenbin Yao wrote:
> From: Qiang Yu <quic_qianyu@...cinc.com>
>
> All PCIe PHYs on the X1E80100 SOC require the vdda-qref, which feeds QREF
> clocks provided by the TCSR device.
This still looks wrong and you never replied to why these supplies
shouldn't be handled by the tcsr clock driver that supplies these
clocks:
https://lore.kernel.org/lkml/aBHUmXx6N72_sCH9@hovoldconsulting.com/
> Hence, restore the vdda-qref request for the 6th PCIe instance by reverting
> commit 031b46b4729b ("phy: qcom: qmp-pcie: drop bogus x1e80100 qref
> supplies"). For the 4th PCIe instance (Gen3 x2), add a new driver data
> entry, namely x1e80100_qmp_gen3x2_pciephy_cfg, which is a copy of
> sm8550_qmp_gen3x2_pciephy_cfg but uses sm8550_qmp_phy_vreg_l instead.
>
> Fixes: 031b46b4729b ("phy: qcom: qmp-pcie: drop bogus x1e80100 qref supplies")
> Fixes: 606060ce8fd0 ("phy: qcom-qmp-pcie: Add support for X1E80100 g3x2 and g4x2 PCIE")
> Cc: Johan Hovold <johan+linaro@...nel.org>
> Cc: Abel Vesa <abel.vesa@...aro.org>
> Signed-off-by: Qiang Yu <quic_qianyu@...cinc.com>
> Signed-off-by: Wenbin Yao <quic_wenbyao@...cinc.com>
Johan
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