linux-kernel - Re: [PATCH 2/4] dt-bindings: iommu: mediatek: mt8195 Accept up to 5 interrupts

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <ff8da58b-9e87-46d9-b4d2-4059ef05780d@collabora.com>
Date: Thu, 8 May 2025 10:34:45 +0200
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Krzysztof Kozlowski <krzk@...nel.org>,
 Julien Massot <julien.massot@...labora.com>, kernel@...labora.com,
 Sen Chu <sen.chu@...iatek.com>, Sean Wang <sean.wang@...iatek.com>,
 Macpaul Lin <macpaul.lin@...iatek.com>, Lee Jones <lee@...nel.org>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Matthias Brugger
 <matthias.bgg@...il.com>, Nícolas F. R. A. Prado
 <nfraprado@...labora.com>, Hui Liu <hui.liu@...iatek.com>,
 Yong Wu <yong.wu@...iatek.com>, Joerg Roedel <joro@...tes.org>,
 Will Deacon <will@...nel.org>, Robin Murphy <robin.murphy@....com>,
 Tinghan Shen <tinghan.shen@...iatek.com>
Cc: linux-pm@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 linux-mediatek@...ts.infradead.org, iommu@...ts.linux.dev
Subject: Re: [PATCH 2/4] dt-bindings: iommu: mediatek: mt8195 Accept up to 5
 interrupts

Il 08/05/25 08:03, Krzysztof Kozlowski ha scritto:
> On 05/05/2025 15:23, Julien Massot wrote:
>>
>> Fixes: 3b5838d1d82e3 ("arm64: dts: mt8195: Add iommu and smi nodes")
>> Signed-off-by: Julien Massot <julien.massot@...labora.com>
>> ---
>>   Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml | 3 ++-
>>   1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
>> index 75750c64157c868725c087500ac81be4e282c829..035941c2db32170e9a69a5363d8c05ef767bb251 100644
>> --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
>> +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
>> @@ -97,7 +97,8 @@ properties:
>>       maxItems: 1
>>   
>>     interrupts:
>> -    maxItems: 1
>> +    minItems: 1
>> +    maxItems: 5
>>   
> Every iommu or just some (as described in commit msg) can have 5
> interrupts? Looks you miss here proper constraints per variant.
> 
Technically, all of the IOMMUs can have more than one interrupt - but it's not
clear which one and why, as documentation is lacking.

Let's restrict this discussion to MT8195 anyway, as it's the only one declaring
those 5 interrupts...
...all of the IOMMUs declare just one, and mediatek,mt8195-iommu-infra declares 5.

P.S.: Nice catch!

Cheers,
Angelo