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Message-Id: <20250509125646.2727393-1-raghav.s@samsung.com>
Date: Fri, 9 May 2025 18:26:46 +0530
From: Raghav Sharma <raghav.s@...sung.com>
To: robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
alim.akhtar@...sung.com
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org, Raghav
Sharma <raghav.s@...sung.com>
Subject: [PATCH v1] arm64: dts: exynosautov920: add cmu_hsi2 clock DT nodes
Add required dt node for cmu_hsi2 block, which
provides clocks to ufs and ethernet IPs
Signed-off-by: Raghav Sharma <raghav.s@...sung.com>
---
arch/arm64/boot/dts/exynos/exynosautov920.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
index 2cb8041c8a9f..7890373f5da0 100644
--- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi
@@ -1048,6 +1048,23 @@ pinctrl_hsi1: pinctrl@...50000 {
interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>;
};
+ cmu_hsi2: clock-controller@...00000 {
+ compatible = "samsung,exynosautov920-cmu-hsi2";
+ reg = <0x16b00000 0x8000>;
+ #clock-cells = <1>;
+
+ clocks = <&xtcxo>,
+ <&cmu_top DOUT_CLKCMU_HSI2_NOC>,
+ <&cmu_top DOUT_CLKCMU_HSI2_NOC_UFS>,
+ <&cmu_top DOUT_CLKCMU_HSI2_UFS_EMBD>,
+ <&cmu_top DOUT_CLKCMU_HSI2_ETHERNET>;
+ clock-names = "oscclk",
+ "noc",
+ "ufs",
+ "embd",
+ "ethernet";
+ };
+
pinctrl_hsi2: pinctrl@...10000 {
compatible = "samsung,exynosautov920-pinctrl";
reg = <0x16c10000 0x10000>;
--
2.34.1
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