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Message-Id: <20250509152940.2004660-7-ioana.ciornei@nxp.com>
Date: Fri, 9 May 2025 18:29:40 +0300
From: Ioana Ciornei <ioana.ciornei@....com>
To: lee@...nel.org,
robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
shawnguo@...nel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Cc: vladimir.oltean@....com,
Ioana Ciornei <ioana.ciornei@....com>
Subject: [PATCH v2 6/6] arm64: dts: lx2160a-qds: add the two on-board RGMII PHYs
Describe the two LX2160AQDS on-board RGMII PHYs on their respective MDIO
buses behind the MDIO multiplexer.
Signed-off-by: Ioana Ciornei <ioana.ciornei@....com>
---
Changes in v2:
- none
.../boot/dts/freescale/fsl-lx2160a-qds.dts | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
index 426fb4c39ab8..be65fb559107 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
@@ -43,12 +43,22 @@ mdio@0 { /* On-board PHY #1 RGMI1*/
reg = <0x00>;
#address-cells = <1>;
#size-cells = <0>;
+
+ rgmii_phy1: ethernet-phy@1 {
+ compatible = "ethernet-phy-id001c.c916";
+ reg = <0x1>;
+ };
};
mdio@8 { /* On-board PHY #2 RGMI2*/
reg = <0x8>;
#address-cells = <1>;
#size-cells = <0>;
+
+ rgmii_phy2: ethernet-phy@2 {
+ compatible = "ethernet-phy-id001c.c916";
+ reg = <0x2>;
+ };
};
mdio@18 { /* Slot #1 */
@@ -169,6 +179,16 @@ &crypto {
status = "okay";
};
+&dpmac17 {
+ phy-handle = <&rgmii_phy1>;
+ phy-connection-type = "rgmii-id";
+};
+
+&dpmac18 {
+ phy-handle = <&rgmii_phy2>;
+ phy-connection-type = "rgmii-id";
+};
+
&dspi0 {
status = "okay";
--
2.25.1
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