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Message-ID: <174681427510.3878879.9476467929074035789.robh@kernel.org>
Date: Fri, 9 May 2025 13:11:15 -0500
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Matthew Gerlach <matthew.gerlach@...era.com>
Cc: dinguyen@...nel.org, mturquette@...libre.com,
	linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
	sboyd@...nel.org, conor+dt@...nel.org, krzk+dt@...nel.org,
	linux-clk@...r.kernel.org
Subject: Re: [PATCH v3] dt-bindings: clock: socfpga: convert to yaml


On Thu, 24 Apr 2025 07:43:41 -0700, Matthew Gerlach wrote:
> Convert the clock device tree bindings to yaml for the Altera SoCFPGA
> Cyclone5, Arria5, and Arria10 chip families. Since the clock nodes are
> subnodes to Altera SOCFPGA Clock Manager, the yaml was added to
> socfpga-clk-manager.yaml.
> 
> Signed-off-by: Matthew Gerlach <matthew.gerlach@...era.com>
> ---
> v3:
>  - Add a properties level to $defs to improve reuse.
> 
> v2:
>  - Fix node name regexs.
>  - Remove redundant type for clocks.
>  - Put repeated properties under '$defs'.
>  - Move reg property after compatible.
> ---
>  .../arm/altera/socfpga-clk-manager.yaml       | 102 +++++++++++++++++-
>  .../bindings/clock/altr_socfpga.txt           |  30 ------
>  2 files changed, 101 insertions(+), 31 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/clock/altr_socfpga.txt
> 

Reviewed-by: Rob Herring (Arm) <robh@...nel.org>


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