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Message-ID: <a1aefddb-6914-42b8-9ba9-8eb27a0ce2f4@quicinc.com>
Date: Fri, 9 May 2025 15:18:51 +0530
From: Pavan Kondeti <pavan.kondeti@....qualcomm.com>
To: Unnathi Chalicheemala <unnathi.chalicheemala@....qualcomm.com>
Cc: Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, linux-arm-msm@...r.kernel.org,
        linux-kernel@...r.kernel.org, kernel@....qualcomm.com,
        Prasad Sodagudi <prasad.sodagudi@....qualcomm.com>,
        Satya Durga Srinivasu Prabhala <quic_satyap@...cinc.com>,
        Trilok Soni <quic_tsoni@...cinc.com>
Subject: Re: [PATCH v6 2/3] firmware: qcom_scm: Support multiple waitq
 contexts

On Fri, Apr 25, 2025 at 04:48:02PM -0700, Unnathi Chalicheemala wrote:
>  
> +static int qcom_scm_query_waitq_count(struct qcom_scm *scm)
> +{
> +	int ret;
> +	struct qcom_scm_desc desc = {
> +		.svc = QCOM_SCM_SVC_WAITQ,
> +		.cmd = QCOM_SCM_WAITQ_GET_INFO,
> +		.owner = ARM_SMCCC_OWNER_SIP
> +	};
> +	struct qcom_scm_res res;
> +
> +	if (!__qcom_scm_is_call_available(scm->dev, QCOM_SCM_SVC_WAITQ, QCOM_SCM_WAITQ_GET_INFO)) {
> +		dev_info(scm->dev, "Multi-waitqueue support unavailable\n");
> +		return 1;
> +	}

I am testing this patch on SM8750 and found that we are returning from
here, do you know why it is happening? The first patch in this series
does not check if scm call is available or not and I see scm returns the
hwirq properly. I have commented out this block and able to see waitq
count as 2, which is inline with what would be overlayed in the device
tree.

> +
> +	ret = qcom_scm_call_atomic(scm->dev, &desc, &res);
> +	if (ret)
> +		return ret;
> +
> +	return res.result[0] & GENMASK(7, 0);
> +}
> +

Thanks,
Pavan

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