linux-kernel - Re: [PATCH 3/7] clk: renesas: rzg2l-cpg: Add support for MSTOP in clock enable/disable API

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Message-ID: <CAMuHMdWOihhQtpi+J9t-4bApEHx+f6_q7NtdEiLVi63krZnK=w@mail.gmail.com>
Date: Fri, 9 May 2025 14:12:36 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Claudiu Beznea <claudiu.beznea@...on.dev>
Cc: mturquette@...libre.com, sboyd@...nel.org, robh@...nel.org, 
	krzk+dt@...nel.org, conor+dt@...nel.org, magnus.damm@...il.com, 
	linux-renesas-soc@...r.kernel.org, linux-clk@...r.kernel.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Subject: Re: [PATCH 3/7] clk: renesas: rzg2l-cpg: Add support for MSTOP in
 clock enable/disable API

Hi Claudiu,

On Fri, 9 May 2025 at 12:58, Claudiu Beznea <claudiu.beznea@...on.dev> wrote:
> On 07.05.2025 18:47, Geert Uytterhoeven wrote:
> > On Thu, 10 Apr 2025 at 16:06, Claudiu <claudiu.beznea@...on.dev> wrote:
> >> From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
> >>
> >> The RZ/{G2L, V2L, G3S} CPG versions support a feature called MSTOP. Each
> >> module has one or more MSTOP bits associated with it, and these bits need
> >> to be configured along with the module clocks. Setting the MSTOP bits
> >> switches the module between normal and standby states.
> >>
> >> Previously, MSTOP support was abstracted through power domains
> >> (struct generic_pm_domain::{power_on, power_off} APIs). With this
> >> abstraction, the order of setting the MSTOP and CLKON bits was as follows:
> >>
> >> Previous Order:
> >> A/ Switching to Normal State (e.g., during probe):
> >> 1/ Clear module MSTOP bits
> >> 2/ Set module CLKON bits
> >>
> >> B/ Switching to Standby State (e.g., during remove):
> >> 1/ Clear CLKON bits
> >> 2/ Set MSTOP bits
> >>
> >> However, in some cases (when the clock is disabled through devres), the
> >> order may have been (due to the issue described in link section):
> >>
> >> 1/ Set MSTOP bits
> >> 2/ Clear CLKON bits
> >>
> >> Recently, the hardware team has suggested that the correct order to set
> >> the MSTOP and CLKON bits is:
> >>
> >> Updated Order:
> >> A/ Switching to Normal State (e.g., during probe):
> >> 1/ Set CLKON bits
                  ^^^^
                  plural

> >> 2/ Clear MSTOP bits
                    ^^^^
                    plural

> > What is the recommended order in case multiple clocks map to
> > the same module? Clear the MSTOP bit(s) after enabling the first clock,
> > or clear the MSTOP bit(s) after enabling all clocks?
>
> I can't find anything about this in the HW manual.
>
> > I believe the code implements the former?
>
> The proposed implementation clears the MSTOP after enabling the first clock
> taking into account that there might be cases where 2 clocks sharing the
> same MSTOP may not be both enabled for a particular functionality.

I am wondering if all clocks must be enabled before clearing MSTOP,
as the recommendation from the hardware team uses the plural bits.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds