linux-kernel - Re: [PATCH] arm64: cacheinfo: Report cache sets, ways, and line size

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Message-ID: <20250510-fresh-magenta-owl-c36fb7@sudeepholla>
Date: Sat, 10 May 2025 08:04:56 +0100
From: Sudeep Holla <sudeep.holla@....com>
To: Sean Anderson <sean.anderson@...ux.dev>
Cc: Catalin Marinas <catalin.marinas@....com>,
	Sudeep Holla <sudeep.holla@....com>,
	linux-arm-kernel@...ts.infradead.org,
	Radu Rendec <rrendec@...hat.com>, Will Deacon <will@...nel.org>,
	Thomas Weißschuh <thomas.weissschuh@...utronix.de>,
	Thomas Gleixner <tglx@...utronix.de>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: cacheinfo: Report cache sets, ways, and line size

On Fri, May 09, 2025 at 07:37:35PM -0400, Sean Anderson wrote:
> Cache geometry is exposed through the Cache Size ID register. There is
> one register for each cache, and they are selected through the Cache
> Size Selection register. If FEAT_CCIDX is implemented, the layout of
> CCSIDR changes to allow a larger number of sets and ways.
> 

Please refer
Commit a8d4636f96ad ("arm64: cacheinfo: Remove CCSIDR-based cache information probing")

-- 
Regards,
Sudeep