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Message-ID: <6747980.G0QQBjFxQf@diego>
Date: Sun, 11 May 2025 17:32:30 +0200
From: Heiko StĂĽbner <heiko@...ech.de>
To: Chukun Pan <amadeus@....edu.cn>
Cc: amadeus@....edu.cn, ziyao@...root.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-rockchip@...ts.infradead.org
Subject: Re: [PATCH v7 4/5] arm64: dts: rockchip: add core dtsi for RK3562 SoC
Am Sonntag, 11. Mai 2025, 17:01:01 Mitteleuropäische Sommerzeit schrieb Chukun Pan:
> Hi,
>
> > I might be blind, but I don't see a tab missing here? #adress-cells and
> > #size-cells are in the same level of indentation as the other properties
> > of spi0? I did move the -cells down though now.
>
> Sorry I didn't make it clear. This refers to -cells.
>
> > hopefully caught all pwms now
>
> The pinctrl-names of pwm4 to pwm15 are still "active".
>
> > + saradc0: adc@...30000 {
> > + compatible = "rockchip,rk3562-saradc";
> > + reg = <0x0 0xff730000 0x0 0x100>;
> > + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
> > + #io-channel-cells = <1>;
>
> > > `#io-channel-cells` should be put above `status = "disabled";`
> >
> > moved now :-)
>
> It looks like saradc0 forgot to change.
adapted the rk3562 dtsi again, with those last remants :-)
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