linux-kernel - Re: [RESEND PATCH v3 0/8] General updates and two new drivers for HiSilicon Uncore PMU

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <e45f5183-d1ff-970b-3b15-7f7239b6b405@huawei.com>
Date: Mon, 12 May 2025 16:42:33 +0800
From: Yicong Yang <yangyicong@...wei.com>
To: <will@...nel.org>, <mark.rutland@....com>,
	<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>
CC: <yangyicong@...ilicon.com>, <hejunhao3@...wei.com>,
	<jonathan.cameron@...wei.com>, <prime.zeng@...ilicon.com>,
	<linuxarm@...wei.com>, <wangyushan12@...wei.com>
Subject: Re: [RESEND PATCH v3 0/8] General updates and two new drivers for
 HiSilicon Uncore PMU

a gentle ping on this...

thanks.

On 2025/4/25 17:00, Yicong Yang wrote:
> From: Yicong Yang <yangyicong@...ilicon.com>
> 
> Support new version of DDRC/SLLC PMU identified with updated ACPI HID and
> register definition. In order to support this, we do a preliminary refactor
> to initialize device of each version by using driver data of each HID
> rather than checking the version. This will also make the driver easier to
> maintain and extend, since only the HID specific information along
> with the new HID will be added to support the new version without touching
> the common logic.
> 
> Two new Uncore PMU drivers is also added to support the monitoring the
> events of the system bus (by NoC PMU) and the DVM operations (by MN PMU).
> 
> Change since v2:
> - Rebase on 6.15-rc1, add Jonathan's tag.
> Link: https://lore.kernel.org/linux-arm-kernel/20250321073846.23507-1-yangyicong@huawei.com/
> 
> Change since v1:
> - Fold patch which extending the struct hisi_pmu_dev_info into its user
> - Use bit shift rather than bit mask for SLLC PMU registers configuration
> - Address other comments by Jonathan, thanks
> Link: https://lore.kernel.org/linux-arm-kernel/20250218092000.41641-1-yangyicong@huawei.com/
> 
> Junhao He (6):
>   drivers/perf: hisi: Simplify the probe process for each DDRC version
>   drivers/perf: hisi: Add support for HiSilicon DDRC v3 PMU driver
>   drivers/perf: hisi: Use ACPI driver_data to retrieve SLLC PMU
>     information
>   drivers/perf: hisi: Add support for HiSilicon SLLC v3 PMU driver
>   drivers/perf: hisi: Relax the event number check of v2 PMUs
>   drivers/perf: hisi: Add support for HiSilicon MN PMU driver
> 
> Yicong Yang (2):
>   drivers/perf: hisi: Support PMUs with no interrupt
>   drivers/perf: hisi: Add support for HiSilicon NoC PMU
> 
>  Documentation/admin-guide/perf/hisi-pmu.rst   |  11 +
>  drivers/perf/hisilicon/Makefile               |   3 +-
>  drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c | 354 ++++++++--------
>  drivers/perf/hisilicon/hisi_uncore_hha_pmu.c  |   6 +-
>  drivers/perf/hisilicon/hisi_uncore_mn_pmu.c   | 355 ++++++++++++++++
>  drivers/perf/hisilicon/hisi_uncore_noc_pmu.c  | 392 ++++++++++++++++++
>  drivers/perf/hisilicon/hisi_uncore_pa_pmu.c   |   2 +-
>  drivers/perf/hisilicon/hisi_uncore_pmu.c      |  11 +-
>  drivers/perf/hisilicon/hisi_uncore_pmu.h      |   2 +
>  drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c | 220 +++++++---
>  10 files changed, 1098 insertions(+), 258 deletions(-)
>  create mode 100644 drivers/perf/hisilicon/hisi_uncore_mn_pmu.c
>  create mode 100644 drivers/perf/hisilicon/hisi_uncore_noc_pmu.c
>