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Message-ID: <20250512084552.1586883-4-xin@zytor.com>
Date: Mon, 12 May 2025 01:45:52 -0700
From: "Xin Li (Intel)" <xin@...or.com>
To: linux-kernel@...r.kernel.org, xen-devel@...ts.xenproject.org,
linux-acpi@...r.kernel.org
Cc: tglx@...utronix.de, mingo@...nel.org, bp@...en8.de,
dave.hansen@...ux.intel.com, x86@...nel.org, hpa@...or.com,
peterz@...radead.org, jgross@...e.com, boris.ostrovsky@...cle.com,
rafael@...nel.org, lenb@...nel.org
Subject: [PATCH v1 3/3] x86/msr: Convert a native_wrmsr() use to native_wrmsrq()
Convert a native_wrmsr() use to native_wrmsrq() to zap meaningless type
conversions when a u64 MSR value is splitted into two u32.
Signed-off-by: Xin Li (Intel) <xin@...or.com>
---
arch/x86/coco/sev/core.c | 7 +------
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c
index ff82151f7718..b3ce6fc8b62d 100644
--- a/arch/x86/coco/sev/core.c
+++ b/arch/x86/coco/sev/core.c
@@ -282,12 +282,7 @@ static inline u64 sev_es_rd_ghcb_msr(void)
static __always_inline void sev_es_wr_ghcb_msr(u64 val)
{
- u32 low, high;
-
- low = (u32)(val);
- high = (u32)(val >> 32);
-
- native_wrmsr(MSR_AMD64_SEV_ES_GHCB, low, high);
+ native_wrmsrq(MSR_AMD64_SEV_ES_GHCB, val);
}
static int vc_fetch_insn_kernel(struct es_em_ctxt *ctxt,
--
2.49.0
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