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Message-ID: <20250513-earache-cesspool-6d08e2cfb73a@spud>
Date: Tue, 13 May 2025 15:55:20 +0100
From: Conor Dooley <conor@...nel.org>
To: Yassine Ouaissa <yassine.ouaissa@...egrodvt.com>
Cc: Michael Tretter <m.tretter@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Michal Simek <michal.simek@....com>,
Neil Armstrong <neil.armstrong@...aro.org>,
Heiko Stuebner <heiko@...ech.de>, Junhao Xie <bigfoot@...ssfun.cn>,
Aradhya Bhatia <a-bhatia1@...com>,
Rafał Miłecki <rafal@...ecki.pl>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Kever Yang <kever.yang@...k-chips.com>,
Hans Verkuil <hverkuil@...all.nl>,
Sebastian Fricke <sebastian.fricke@...labora.com>,
Uwe Kleine-König <u.kleine-koenig@...libre.com>,
Wolfram Sang <wsa+renesas@...g-engineering.com>,
Gaosheng Cui <cuigaosheng1@...wei.com>,
Christophe JAILLET <christophe.jaillet@...adoo.fr>,
Joe Hattori <joe@...is.s.u-tokyo.ac.jp>,
Ricardo Ribalda <ribalda@...omium.org>, linux-media@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [RESEND PATCH 3/5] dt-bindings: media: allegrodvt: add decoder
dt-bindings for Gen3 IP
On Tue, May 13, 2025 at 10:35:48AM +0200, Yassine Ouaissa wrote:
> Add compatible for video decoder on allegrodvt Gen 3 IP.
>
> Signed-off-by: Yassine Ouaissa <yassine.ouaissa@...egrodvt.com>
> ---
> .../bindings/media/allegrodvt,al300-vdec.yaml | 83 +++++++++++++++++++
> 1 file changed, 83 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/media/allegrodvt,al300-vdec.yaml
>
> diff --git a/Documentation/devicetree/bindings/media/allegrodvt,al300-vdec.yaml b/Documentation/devicetree/bindings/media/allegrodvt,al300-vdec.yaml
> new file mode 100644
> index 000000000000..4218892d6950
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/allegrodvt,al300-vdec.yaml
> @@ -0,0 +1,83 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/allegrodvt,al300-vdec.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Allegro DVT Video IP Decoder Gen 3
> +
> +maintainers:
> + - Yassine OUAISSA <yassine.ouaissa@...egrodvt.com>
> +
> +description:
> + The al300-vdec represents the latest generation of Allegro DVT IP decoding
> + technology, offering significant advancements over its predecessors.
> + This new decoder features enhanced processing capabilities with improved
> + throughput and reduced latency.
> +
> + Communication between the host driver software and the MCU is implemented
> + through a specialized mailbox interface mechanism. This mailbox system
> + provides a structured channel for exchanging commands, parameters, and
> + status information between the host CPU and the MCU controlling the codec
> + engines.
> +
> +properties:
> + compatible:
> + const: allegrodvt,al300-vdec
Other than the vendor prefix, this looks mostly okay - from the
perspective of someone unaware of this type of this device.
Just some minor comments from me.
> +
> + reg:
> + items:
> + - description: The registers
The registers for what exactly?
> + - description: the MCU APB register
0x80000 is rather a large space for a single register!
> +
> + reg-names:
> + items:
> + - const: regs
> + - const: apb
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description: MCU clock
> +
> + clock-names:
> + items:
> + - const: mcu_clk
s/_clk//, since that part is obvious.
> +
> + memory-region:
> + maxItems: 1
> +
> + firmware-name:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - reg-names
> + - interrupts
> + - clocks
> + - clock-names
> +
> +additionalProperties: False
> +
> +examples:
> + - |
> + axi {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + ald300@...20000 {
The standard node name here I believe is "video-decoder".
> + compatible = "allegrodvt,al300-vdec";
> + reg = <0 0xa0120000 0 0x10000>,
> + <1 0x80000000 0 0x80000>;
Please keep things consistently in hex here please.
> + reg-names = "regs", "apb";
> + interrupts = <0 96 4>;
If this is 3 different interrupts, format as "<0>, <96>, <4>".
Otherwise, consider importing whatever header provides definitions for
these things.
> + clocks = <&mcu_clock_dec>;
> + clock-names = "mcu_clk";
> + firmware-name = "al300_vdec.fw";
> + };
> + };
> +
> +...
> --
> 2.30.2
>
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