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Message-ID: <20250513-duplex-collage-5a52f50b74bb@spud>
Date: Tue, 13 May 2025 16:53:09 +0100
From: Conor Dooley <conor@...nel.org>
To: Ben Zong-You Xie <ben717@...estech.com>
Cc: paul.walmsley@...ive.com, palmer@...belt.com, aou@...s.berkeley.edu,
alex@...ti.fr, robh@...nel.org, krzk+dt@...nel.org,
conor+dt@...nel.org, tglx@...utronix.de, daniel.lezcano@...aro.org,
prabhakar.mahadev-lad.rj@...renesas.com, devicetree@...r.kernel.org,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
tim609@...estech.com
Subject: Re: [PATCH v3 6/9] dt-bindings: cache: add QiLai compatible to ax45mp
On Tue, May 13, 2025 at 05:49:30PM +0800, Ben Zong-You Xie wrote:
> Add a new compatible string for ax45mp-cache on QiLai SoC.
>
> Also, add allOf constraints to enforce specific cache-sets and cache-size
> values for each compatible string.
"Also" is a massive hint that this should be two patches. I think the
Renesas part (if it can only do 1024/262144, and is not configurable)
should be a patch of its own, since it is valid independent of this
being added.
>
> Signed-off-by: Ben Zong-You Xie <ben717@...estech.com>
> ---
> .../cache/andestech,ax45mp-cache.yaml | 52 +++++++++++++++++--
> 1 file changed, 47 insertions(+), 5 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml b/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml
> index df8bba14f758..dc03ffae6c9f 100644
> --- a/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml
> +++ b/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml
> @@ -28,7 +28,9 @@ select:
> properties:
> compatible:
> items:
> - - const: renesas,r9a07g043f-ax45mp-cache
> + - enum:
> + - andestech,qilai-ax45mp-cache
> + - renesas,r9a07g043f-ax45mp-cache
> - const: andestech,ax45mp-cache
> - const: cache
>
> @@ -44,11 +46,9 @@ properties:
> cache-level:
> const: 2
>
> - cache-sets:
> - enum: [1024, 2048]
^^ this and...
> + cache-sets: true
>
> - cache-size:
> - enum: [131072, 262144, 524288, 1048576, 2097152]
... ^^ this should remain at the top level...
> + cache-size: true
>
> cache-unified: true
>
> @@ -66,7 +66,49 @@ required:
> - cache-size
> - cache-unified
>
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: andestech,qilai-ax45mp-cache
> +
> + then:
> + properties:
> + cache-sets:
> + const: 2048
> + cache-size:
> + const: 2097152
...and you just constrain things here. Effectively this means just
restore the enum outside the if/then/else.
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: renesas,r9a07g043f-ax45mp-cache
> +
> + then:
> + properties:
> + cache-sets:
> + const: 1024
> + cache-size:
> + const: 262144
> +
> examples:
> + - |
> + #include <dt-bindings/interrupt-controller/irq.h>
Honestly, just delete this whole example, it doesn't do anything
meaningfully different from the existing one.
> + l2_cache: cache-controller@...000 {
But if you don't delete the example, remove the "l2_cache" label cos it
is unused.
Cheers,
Conor.
> + compatible = "andestech,qilai-ax45mp-cache", "andestech,ax45mp-cache",
> + "cache";
> + reg = <0x00200000 0x100000>;
> + interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
> + cache-line-size = <64>;
> + cache-level = <2>;
> + cache-sets = <2048>;
> + cache-size = <2097152>;
> + cache-unified;
> + };
> +
> - |
> #include <dt-bindings/interrupt-controller/irq.h>
>
> --
> 2.34.1
>
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