linux-kernel - 答复: [PATCH] Documentation (arm64):Advanced SIMD and floating point support condition

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Message-ID: <8d9400dcdf9442de82f43c484e82e7f2@hisilicon.com>
Date: Tue, 13 May 2025 03:11:15 +0000
From: Zhangxiquan <zhangxiquan@...ilicon.com>
To: "Will Deacon " <IMCEAMAILTO-will+40kernel+2Eorg@...wei.com>
CC: "catalin.marinas@....com" <catalin.marinas@....com>, "corbet@....net"
	<corbet@....net>, "linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "linux-doc@...r.kernel.org"
	<linux-doc@...r.kernel.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, "maz@...nel.org" <maz@...nel.org>,
	Zhengbingyang <zhengbingyang@...ilicon.com>, "Zhangyu(curtain,Babbage)"
	<zhangyu550@...wei.com>, "wangkai (CF)" <wangkai113@...wei.com>
Subject: 答复: [PATCH] Documentation (arm64):Advanced SIMD and floating point support condition

Hi Will,

Thanks for feedback !

After received your email, we discuss the situation , and align the story as :

To test the hardware, we randomly configured the register before entering Linux. 
One of  our  test cases is to set e2h to 1 and start Linux with el1. 
Later, it is found that this test scenario is not a typical application. 

Therefore, we decided :
we withdraw this patch application , it does not need to be submitted. 

Thank you for your reply again ！

Yu-Zhang 

-----邮件原件-----
发件人: Will Deacon [mailto:will@...nel.org]
发送时间: 2025年4月29日 21:11
收件人: Zhangxiquan <zhangxiquan@...ilicon.com>
抄送: catalin.marinas@....com; corbet@....net; linux-arm-kernel@...ts.infradead.org; linux-doc@...r.kernel.org; linux-kernel@...r.kernel.org; maz@...nel.org
主题: Re: [PATCH] Documentation (arm64):Advanced SIMD and floating point support condition

On Tue, Apr 08, 2025 at 11:13:09AM +0800, Xiquan Zhang wrote:
> From: zhangyu <zhangyu550@...wei.com>
> 
> Because the kernel code cannot be started from el1 according to the 
> booting.rst.
> It is found that CPTR_EL2.FPEN is not configured.
> After the configuration, the problem is solved.
> 
> Signed-off-by: zhangyu <zhangyu550@...wei.com>
> Signed-off-by: zhangxiquan <zhangxiquan@...ilicon.com>
> ---
>  Documentation/arch/arm64/booting.rst | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/arch/arm64/booting.rst
> b/Documentation/arch/arm64/booting.rst
> index dee7b6de864f..ccefc42b51bc 100644
> --- a/Documentation/arch/arm64/booting.rst
> +++ b/Documentation/arch/arm64/booting.rst
> @@ -309,6 +309,7 @@ Before jumping into the kernel, the following conditions must be met:
>    - If EL2 is present and the kernel is entered at EL1:
> 
>      - CPTR_EL2.TFP (bit 10) must be initialised to 0b0.
> +    - CPTR_EL2.FPEN (bit 21:20) must be initialised to 0b11.

Sorry, but I don't quite understand this. CPTR_EL2 has a different format depending on HCR_EL2.E2H and the FPEN field only exists when that bit is set to 1. In that case, however, why would the kernel be entered at EL1?

Will