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Message-ID: <20250513075532.GB14572@nxa18884-linux>
Date: Tue, 13 May 2025 15:55:33 +0800
From: Peng Fan <peng.fan@....nxp.com>
To: Conor Dooley <conor@...nel.org>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	Pengutronix Kernel Team <kernel@...gutronix.de>,
	Fabio Estevam <festevam@...il.com>,
	Dong Aisheng <aisheng.dong@....com>, Jacky Bai <ping.bai@....com>,
	NXP S32 Linux Team <s32@....com>,
	Linus Walleij <linus.walleij@...aro.org>,
	devicetree@...r.kernel.org, imx@...ts.linux.dev,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	linux-gpio@...r.kernel.org, Peng Fan <peng.fan@....com>
Subject: Re: [PATCH 1/3] dt-bindings: firmware: nxp,imx95-scmi-pinctrl:
 Introduce nxp,iomuxc-daisy-off

Hi Conor,

On Mon, May 12, 2025 at 05:20:17PM +0100, Conor Dooley wrote:
>On Mon, May 12, 2025 at 10:14:14AM +0800, Peng Fan (OSS) wrote:
>> From: Peng Fan <peng.fan@....com>
>> 
>> The IOMUX Controller in i.MX9 family has Daisy chain that multi pads drive
>> same module input pin. Each SoC has its own register offset, so
>> introduce "nxp,iomuxc-daisy-off" property to specify the daisy register
>> offset. With this property being parsed by driver, there is no need
>> to hardcode the offset in pinctrl driver for each new SoC.
>> 
>> Signed-off-by: Peng Fan <peng.fan@....com>
>> ---
>>  .../devicetree/bindings/firmware/nxp,imx95-scmi-pinctrl.yaml      | 8 ++++++++
>>  1 file changed, 8 insertions(+)
>> 
>> diff --git a/Documentation/devicetree/bindings/firmware/nxp,imx95-scmi-pinctrl.yaml b/Documentation/devicetree/bindings/firmware/nxp,imx95-scmi-pinctrl.yaml
>> index a96fc6cce502c10ab415e0b26bff1be8c3bc82f5..b5b2a9c8688a7f6525cdb6a32db22681f4f1a0b9 100644
>> --- a/Documentation/devicetree/bindings/firmware/nxp,imx95-scmi-pinctrl.yaml
>> +++ b/Documentation/devicetree/bindings/firmware/nxp,imx95-scmi-pinctrl.yaml
>> @@ -13,6 +13,11 @@ maintainers:
>>  allOf:
>>    - $ref: /schemas/pinctrl/pinctrl.yaml
>>  
>> +properties:
>> +  nxp,iomuxc-daisy-off:
>
>Same comment here as was left on the driver.
>I also don't get why there's a property being introduced from something
>you can determine based on the soc.

we are targeting a common pinctrl driver for i.MX SCMI based SoC.
So that means pinctrl-imx-scmi.c needs support i.MX95, i.MX94 and i.MX9[X].

Each time we support a new SoC, we need to hardcode the register offset in
the driver. But if using DT here, no need to update the pinctrl driver anymore
when supporting a new i.MX SoC.

Thanks,
Peng

>
>> +    $ref: /schemas/types.yaml#/definitions/uint32
>> +    description: Specify the IOMUX Controller first Daisy register's offset
>> +
>>  patternProperties:
>>    'grp$':
>>      type: object
>> @@ -51,3 +56,6 @@ patternProperties:
>>        - fsl,pins
>>  
>>  additionalProperties: true
>> +
>> +required:
>> +  - nxp,iomuxc-daisy-off
>> 
>> -- 
>> 2.37.1
>> 



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