linux-kernel - Re: [PATCH v4 2/2] clk: renesas: r9a09g057: Add clock and reset entries for GBETH0/1

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Message-ID: <CA+V-a8uY3F7BD1gPRNmqfP6=WaenDv47Yx1nT8sW9CH_MBCuhQ@mail.gmail.com>
Date: Tue, 13 May 2025 09:47:17 +0100
From: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To: Geert Uytterhoeven <geert@...ux-m68k.org>
Cc: Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, 
	linux-renesas-soc@...r.kernel.org, linux-clk@...r.kernel.org, 
	linux-kernel@...r.kernel.org, Biju Das <biju.das.jz@...renesas.com>, 
	Fabrizio Castro <fabrizio.castro.jz@...esas.com>, 
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v4 2/2] clk: renesas: r9a09g057: Add clock and reset
 entries for GBETH0/1

Hi Geert,

Thank you for the review.

On Tue, May 13, 2025 at 9:03 AM Geert Uytterhoeven <geert@...ux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Fri, 9 May 2025 at 18:01, Prabhakar <prabhakar.csengg@...il.com> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> >
> > Add clock and reset entries for GBETH instances. Include core clocks for
> > PTP, sourced from PLLETH, and add PLLs, dividers, and static mux clocks
> > used as clock sources for the GBETH IP.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> > ---
> > v3->v4:
> > - Dropped adding CPG_SSEL1 and CPG_CSDIV0 macros in rzv2h-cpg.h
> >   as they were already added by XSPI clocks patch
>
> Thanks for the update!
>
> > --- a/drivers/clk/renesas/rzv2h-cpg.h
> > +++ b/drivers/clk/renesas/rzv2h-cpg.h
> > @@ -93,6 +93,7 @@ struct smuxed {
> >                 .width = (_width), \
> >         })
> >
> > +#define CPG_SSEL0              (0x300)
> >  #define CPG_SSEL1              (0x304)
> >  #define CPG_CDDIV0             (0x400)
> >  #define CPG_CDDIV1             (0x404)
> > @@ -118,6 +119,14 @@ struct smuxed {
> >  #define SSEL1_SELCTL2  SMUX_PACK(CPG_SSEL1, 8, 1)
> >  #define SSEL1_SELCTL3  SMUX_PACK(CPG_SSEL1, 12, 1)
> >
> > +#define CSDIV0_DIVCTL0 DDIV_PACK(CPG_CSDIV0, 0, 2, CSDIV_NO_MON)
> > +#define CSDIV0_DIVCTL1 DDIV_PACK(CPG_CSDIV0, 4, 2, CSDIV_NO_MON)
> > +
>
> Moving these above the existing CSDIV0_DIVCTL3...
>
> > +#define SSEL0_SELCTL2  SMUX_PACK(CPG_SSEL0, 8, 1)
> > +#define SSEL0_SELCTL3  SMUX_PACK(CPG_SSEL0, 12, 1)
> > +#define SSEL1_SELCTL0  SMUX_PACK(CPG_SSEL1, 0, 1)
> > +#define SSEL1_SELCTL1  SMUX_PACK(CPG_SSEL1, 4, 1)
> > +
>
> Moving these above the existing SSEL1_SELCTL*...
>
Got it. Thank you for taking care of this .

Cheers,
Prabhakar

> >  #define BUS_MSTOP_IDX_MASK     GENMASK(31, 16)
> >  #define BUS_MSTOP_BITS_MASK    GENMASK(15, 0)
> >  #define BUS_MSTOP(idx, mask)   (FIELD_PREP_CONST(BUS_MSTOP_IDX_MASK, (idx)) | \
> > --
> > 2.49.0
> >
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
> i.e. will queue in renesas-clk for v6.17 with the above changes.
>
> Gr{oetje,eeting}s,
>
>                         Geert
>
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds