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Message-ID: <CAMuHMdX_SVtXjQ_c1w0=qcWHqc+68u_EkJuUjm7R+s4fOYoMBg@mail.gmail.com>
Date: Tue, 13 May 2025 11:38:23 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Thierry Bultel <thierry.bultel.yh@...renesas.com>
Cc: thierry.bultel@...atsea.fr, linux-renesas-soc@...r.kernel.org, 
	paul.barker.ct@...renesas.com, linux-kernel@...r.kernel.org, 
	linux-serial@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH v8 01/11] dt-bindings: serial: Added secondary clock for
 RZ/T2H RSCI

Hi Thierry,

On Tue, 29 Apr 2025 at 10:20, Thierry Bultel
<thierry.bultel.yh@...renesas.com> wrote:
> At boot, the default clock is the PCLKM core lock (synchronous
> clock, which is enabled by the bootloader).
> For different baudrates, the asynchronous clock input must be used.
> Clock selection is made by an internal register of RCSI.
>
> Signed-off-by: Thierry Bultel <thierry.bultel.yh@...renesas.com>

Thanks for your patch!

You forgot to CC the serial and DT maintainers.

> --- a/Documentation/devicetree/bindings/serial/renesas,rsci.yaml
> +++ b/Documentation/devicetree/bindings/serial/renesas,rsci.yaml
> @@ -35,10 +35,14 @@ properties:
>        - const: tei
>
>    clocks:
> -    maxItems: 1
> +    items:
> +      - description: serial functional clock

The Hardware Manual calls this "operation clock".

> +      - description: default core clock

The Hardware Manual calls this "bus clock".

>
>    clock-names:
> -    const: fck # UART functional clock
> +    items:
> +      - const: async

"async" is the name on the producer side, not the consumer side.
"operation"?

> +      - const: bus
>
>    power-domains:
>      maxItems: 1
> @@ -58,11 +62,7 @@ unevaluatedProperties: false
>  examples:
>    - |
>      #include <dt-bindings/interrupt-controller/arm-gic.h>
> -    #include <dt-bindings/clock/renesas-cpg-mssr.h>
> -
> -    aliases {
> -        serial0 = &sci0;
> -    };

While this change is good, it is not mentioned in the commit
description.

> +    #include <dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h>

This has a hard dependency on "[PATCH v8 03/11] dt-bindings: clock:
Add cpg for the Renesas RZ/T2H SoC".  To relax that dependency, you can
s/R9A09G077_CLK_PCLKM/13/ below..

>
>      sci0: serial@...05000 {
>          compatible = "renesas,r9a09g077-rsci";
> @@ -72,7 +72,7 @@ examples:
>                       <GIC_SPI 592 IRQ_TYPE_EDGE_RISING>,
>                       <GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH>;
>          interrupt-names = "eri", "rxi", "txi", "tei";
> -        clocks = <&cpg CPG_MOD 108>;
> -        clock-names = "fck";
> +        clocks = <&cpg CPG_MOD 108>, <&cpg CPG_CORE R9A09G077_CLK_PCLKM>;

s/108/8/?

> +        clock-names = "async", "bus";
>          power-domains = <&cpg>;
>      };

Gr{oetje,eeting}s,

                        Geert


--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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