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Message-ID: <CAMuHMdUxKs=4tUg8iNFDUFdZVSmXz8SvZsDnbjvmbQ_FBsRhwQ@mail.gmail.com>
Date: Tue, 13 May 2025 15:17:29 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Thierry Bultel <thierry.bultel.yh@...renesas.com>
Cc: thierry.bultel@...atsea.fr, linux-renesas-soc@...r.kernel.org,
paul.barker.ct@...renesas.com, linux-kernel@...r.kernel.org,
linux-serial@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH v8 01/11] dt-bindings: serial: Added secondary clock for
RZ/T2H RSCI
Hi Thierry,
On Tue, 13 May 2025 at 11:38, Geert Uytterhoeven <geert@...ux-m68k.org> wrote:
> On Tue, 29 Apr 2025 at 10:20, Thierry Bultel
> <thierry.bultel.yh@...renesas.com> wrote:
> > At boot, the default clock is the PCLKM core lock (synchronous
> > clock, which is enabled by the bootloader).
> > For different baudrates, the asynchronous clock input must be used.
> > Clock selection is made by an internal register of RCSI.
> >
> > Signed-off-by: Thierry Bultel <thierry.bultel.yh@...renesas.com>
> > --- a/Documentation/devicetree/bindings/serial/renesas,rsci.yaml
> > +++ b/Documentation/devicetree/bindings/serial/renesas,rsci.yaml
> > @@ -35,10 +35,14 @@ properties:
> > - const: tei
> >
> > clocks:
> > - maxItems: 1
> > + items:
> > + - description: serial functional clock
>
> The Hardware Manual calls this "operation clock".
>
> > + - description: default core clock
>
> The Hardware Manual calls this "bus clock".
>
> >
> > clock-names:
> > - const: fck # UART functional clock
> > + items:
> > + - const: async
>
> "async" is the name on the producer side, not the consumer side.
> "operation"?
>
> > + - const: bus
Actually there can be a third optional clock, just like on all other
variants except for SCIFA/SCIFB: the external SCK pin.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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