linux-kernel - [PATCH RFT v2 13/15] soc: qcom: ubwc: Fix SM6125's ubwc

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Message-Id: <20250514-topic-ubwc_central-v2-13-09ecbc0a05ce@oss.qualcomm.com>
Date: Wed, 14 May 2025 17:10:33 +0200
From: Konrad Dybcio <konradybcio@...nel.org>
To: Bjorn Andersson <andersson@...nel.org>, 
 Konrad Dybcio <konradybcio@...nel.org>, Rob Clark <robdclark@...il.com>, 
 Abhinav Kumar <quic_abhinavk@...cinc.com>, 
 Dmitry Baryshkov <lumag@...nel.org>, 
 Akhil P Oommen <quic_akhilpo@...cinc.com>, Sean Paul <sean@...rly.run>, 
 David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>
Cc: Marijn Suijten <marijn.suijten@...ainline.org>, 
 linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org, 
 dri-devel@...ts.freedesktop.org, freedreno@...ts.freedesktop.org, 
 Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Subject: [PATCH RFT v2 13/15] soc: qcom: ubwc: Fix SM6125's ubwc_swizzle
 value

From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>

The value of 7 (a.k.a. GENMASK(2, 0), a.k.a. disabling levels 1-3 of
swizzling) is what we want on this platform (and others with a UBWC
1.0 encoder).

Fix it to make mesa happy (the hardware doesn't care about the 2 higher
bits, as they weren't consumed on this platform).

Signed-off-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
---
 drivers/soc/qcom/ubwc_config.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/soc/qcom/ubwc_config.c b/drivers/soc/qcom/ubwc_config.c
index 9caecd071035ccb03f14464e9b7129ba34a7f862..96b94cf01218cce2dacdba22c7573ba6148fcdd1 100644
--- a/drivers/soc/qcom/ubwc_config.c
+++ b/drivers/soc/qcom/ubwc_config.c
@@ -103,7 +103,7 @@ static const struct qcom_ubwc_cfg_data sm6115_data = {
 static const struct qcom_ubwc_cfg_data sm6125_data = {
 	.ubwc_enc_version = UBWC_1_0,
 	.ubwc_dec_version = UBWC_3_0,
-	.ubwc_swizzle = 1,
+	.ubwc_swizzle = 7,
 	.highest_bank_bit = 14,
 };
 

-- 
2.49.0