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Message-ID: <8ba99df8-012b-4883-af6a-970dd9f877f6@linaro.org>
Date: Wed, 14 May 2025 18:38:45 +0200
From: neil.armstrong@...aro.org
To: Mrinmay Sarkar <mrinmay.sarkar@....qualcomm.com>,
Vinod Koul <vkoul@...nel.org>, Kishon Vijay Abraham I <kishon@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>
Cc: linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
krishna.chundru@....qualcomm.com, quic_vbadigan@...cinc.com,
quic_nayiluri@...cinc.com, quic_ramkri@...cinc.com,
quic_nitegupt@...cinc.com, Mrinmay Sarkar <quic_msarkar@...cinc.com>
Subject: Re: [PATCH v2 2/2] arm64: dts: qcom: sa8775p: Remove max link speed
property for PCIe EP
On 14/05/2025 13:37, Mrinmay Sarkar wrote:
> From: Mrinmay Sarkar <mrinmay.sarkar@....qualcomm.com>
>
> The maximum link speed was previously restricted to Gen3 due to the
> absence of Gen4 equalization support in the driver.
>
> Add change to remove max link speed property, Since Gen4 equalization
> support has already been added into the driver.
Which driver, PHY or Controller ? does this change depends on the patch 1 PHY settings update ?
>
> Signed-off-by: Mrinmay Sarkar <mrinmay.sarkar@....qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> index 5bd0c03476b143444543c68cd1c1d475c3302555..b001e9a30e863d8964219c8bd61bc328be71b256 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -6462,7 +6462,6 @@ pcie0_ep: pcie-ep@...0000 {
> power-domains = <&gcc PCIE_0_GDSC>;
> phys = <&pcie0_phy>;
> phy-names = "pciephy";
> - max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */
> num-lanes = <2>;
> linux,pci-domain = <0>;
>
> @@ -6620,7 +6619,6 @@ pcie1_ep: pcie-ep@...0000 {
> power-domains = <&gcc PCIE_1_GDSC>;
> phys = <&pcie1_phy>;
> phy-names = "pciephy";
> - max-link-speed = <3>; /* FIXME: Limiting the Gen speed due to stability issues */
> num-lanes = <4>;
> linux,pci-domain = <1>;
>
>
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