[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <20250514050020.3165262-1-bbhushan2@marvell.com>
Date: Wed, 14 May 2025 10:30:16 +0530
From: Bharat Bhushan <bbhushan2@...vell.com>
To: <bbrezillon@...nel.org>, <arno@...isbad.org>, <schalla@...vell.com>,
<herbert@...dor.apana.org.au>, <davem@...emloft.net>,
<iovanni.cabiddu@...el.com>, <linux@...blig.org>,
<linux-crypto@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<stable@...r.kernel.org>
CC: Bharat Bhushan <bbhushan2@...vell.com>
Subject: [PATCH 0/4] crypto: octeontx2: Fix hang and address alignment issues
First patch of the series fixes possible infinite loop.
Remaining three patches fixes address alignment issue observed
after "9382bc44b5f5 arm64: allow kmalloc() caches aligned to the
smaller cache_line_size()"
Patch-2 and patch-3 applies to stable version 6.6 onwards.
Patch-4 applies to stable version 6.12 onwards
Bharat Bhushan (4):
crypto: octeontx2: add timeout for load_fvc completion poll
crypto: octeontx2: Fix address alignment issue on ucode loading
crypto: octeontx2: Fix address alignment on CN10K A0/A1 and OcteonTX2
crypto: octeontx2: Fix address alignment on CN10KB and CN10KA-B0
.../marvell/octeontx2/otx2_cpt_reqmgr.h | 119 +++++++++++++-----
.../marvell/octeontx2/otx2_cptpf_ucode.c | 46 ++++---
2 files changed, 121 insertions(+), 44 deletions(-)
--
2.34.1
Powered by blists - more mailing lists