linux-kernel - Re: [PATCH v3] PCI: Prevent power state transition of erroneous device

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Message-ID: <384a2c60-2f25-4a1d-b8a6-3ea4ea34e2c2@kernel.org>
Date: Wed, 14 May 2025 14:53:09 -0500
From: Mario Limonciello <superm1@...nel.org>
To: Denis Benato <benato.denis96@...il.com>, Raag Jadav
 <raag.jadav@...el.com>, rafael@...nel.org, mahesh@...ux.ibm.com,
 oohall@...il.com, bhelgaas@...gle.com
Cc: linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
 ilpo.jarvinen@...ux.intel.com, lukas@...ner.de,
 aravind.iddamsetty@...ux.intel.com
Subject: Re: [PATCH v3] PCI: Prevent power state transition of erroneous
 device

On 5/14/2025 11:29 AM, Denis Benato wrote:
> Hello,
> 
> Lately I am experiencing a few problems related to either (one of or both) PCI and/or thunderbolt and Mario Limonciello pointed me to this patch.
> 
> you can follow an example of my problems in this [1] bug report.
> 
> I tested this patch on top of 6.14.6 and this patch comes with a nasty regression: s2idle resume breaks all my three GPUs, while for example the sound of a YT video resumes fine.
> 
> You can see the dmesg here: https://pastebin.com/Um7bmdWi
> 
> I will also say that, on the bright side, this patch makes my laptop behave better on boot as the amdgpu plugged on the thunderbolt port is always enabled on power on, while without this patch it is random if it will be active immediately after laptop has been turned on.
> 

Just for clarity - if you unplug your eGPU enclosure before suspend is 
everything OK?  IE this patch only has an impact to the USB4/TBT3 PCIe 
tunnels?

The errors after resume in amdgpu /look/ like the device is "missing" 
from the bus or otherwise not responding.

I think it would be helpful to capture the kernel log with a baseline of 
6.14.6 but without this patch for comparison of what this patch is 
actually causing.

> 
> [1] https://lore.kernel.org/all/965c9753-f14b-4a87-9f6d-8798e09ad6f5@gmail.com/
> 
> On 5/4/25 11:04, Raag Jadav wrote:
> 
>> If error flags are set on an AER capable device, most likely either the
>> device recovery is in progress or has already failed. Neither of the
>> cases are well suited for power state transition of the device, since
>> this can lead to unpredictable consequences like resume failure, or in
>> worst case the device is lost because of it. Leave the device in its
>> existing power state to avoid such issues.
>>
>> Signed-off-by: Raag Jadav <raag.jadav@...el.com>
>> ---
>>
>> v2: Synchronize AER handling with PCI PM (Rafael)
>> v3: Move pci_aer_in_progress() to pci_set_low_power_state() (Rafael)
>>      Elaborate "why" (Bjorn)
>>
>> More discussion on [1].
>> [1] https://lore.kernel.org/all/CAJZ5v0g-aJXfVH+Uc=9eRPuW08t-6PwzdyMXsC6FZRKYJtY03Q@mail.gmail.com/
>>
>>   drivers/pci/pci.c      | 12 ++++++++++++
>>   drivers/pci/pcie/aer.c | 11 +++++++++++
>>   include/linux/aer.h    |  2 ++
>>   3 files changed, 25 insertions(+)
>>
>> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
>> index 4d7c9f64ea24..25b2df34336c 100644
>> --- a/drivers/pci/pci.c
>> +++ b/drivers/pci/pci.c
>> @@ -9,6 +9,7 @@
>>    */
>>   
>>   #include <linux/acpi.h>
>> +#include <linux/aer.h>
>>   #include <linux/kernel.h>
>>   #include <linux/delay.h>
>>   #include <linux/dmi.h>
>> @@ -1539,6 +1540,17 @@ static int pci_set_low_power_state(struct pci_dev *dev, pci_power_t state, bool
>>   	   || (state == PCI_D2 && !dev->d2_support))
>>   		return -EIO;
>>   
>> +	/*
>> +	 * If error flags are set on an AER capable device, most likely either
>> +	 * the device recovery is in progress or has already failed. Neither of
>> +	 * the cases are well suited for power state transition of the device,
>> +	 * since this can lead to unpredictable consequences like resume
>> +	 * failure, or in worst case the device is lost because of it. Leave the
>> +	 * device in its existing power state to avoid such issues.
>> +	 */
>> +	if (pci_aer_in_progress(dev))
>> +		return -EIO;
>> +
>>   	pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);
>>   	if (PCI_POSSIBLE_ERROR(pmcsr)) {
>>   		pci_err(dev, "Unable to change power state from %s to %s, device inaccessible\n",
>> diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
>> index a1cf8c7ef628..4040770df4f0 100644
>> --- a/drivers/pci/pcie/aer.c
>> +++ b/drivers/pci/pcie/aer.c
>> @@ -237,6 +237,17 @@ int pcie_aer_is_native(struct pci_dev *dev)
>>   }
>>   EXPORT_SYMBOL_NS_GPL(pcie_aer_is_native, "CXL");
>>   
>> +bool pci_aer_in_progress(struct pci_dev *dev)
>> +{
>> +	u16 reg16;
>> +
>> +	if (!pcie_aer_is_native(dev))
>> +		return false;
>> +
>> +	pcie_capability_read_word(dev, PCI_EXP_DEVSTA, &reg16);
>> +	return !!(reg16 & PCI_EXP_AER_FLAGS);
>> +}
>> +
>>   static int pci_enable_pcie_error_reporting(struct pci_dev *dev)
>>   {
>>   	int rc;
>> diff --git a/include/linux/aer.h b/include/linux/aer.h
>> index 02940be66324..e6a380bb2e68 100644
>> --- a/include/linux/aer.h
>> +++ b/include/linux/aer.h
>> @@ -56,12 +56,14 @@ struct aer_capability_regs {
>>   #if defined(CONFIG_PCIEAER)
>>   int pci_aer_clear_nonfatal_status(struct pci_dev *dev);
>>   int pcie_aer_is_native(struct pci_dev *dev);
>> +bool pci_aer_in_progress(struct pci_dev *dev);
>>   #else
>>   static inline int pci_aer_clear_nonfatal_status(struct pci_dev *dev)
>>   {
>>   	return -EINVAL;
>>   }
>>   static inline int pcie_aer_is_native(struct pci_dev *dev) { return 0; }
>> +static inline bool pci_aer_in_progress(struct pci_dev *dev) { return false; }
>>   #endif
>>   
>>   void pci_print_aer(struct pci_dev *dev, int aer_severity,