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Message-ID: <20250514052323.3881600-4-quic_lxu5@quicinc.com>
Date: Wed, 14 May 2025 10:53:23 +0530
From: Ling Xu <quic_lxu5@...cinc.com>
To: <cros-qcom-dts-watchers@...omium.org>, <andersson@...nel.org>,
<konradybcio@...nel.org>, <robh@...nel.org>, <krzk+dt@...nel.org>,
<conor+dt@...nel.org>, <linux-arm-msm@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<quic_lxu5@...cinc.com>, <ekansh.gupta@....qualcomm.com>
Subject: [PATCH 3/3] arm64: dts: qcom: sc7280: Add dma-coherent property for fastrpc nodes
Add dma-cherent property to fastrpc context bank nodes to ensure that
the DMA operations for these nodes are coherent.
Signed-off-by: Ling Xu <quic_lxu5@...cinc.com>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 8c04f3471554..70ca57f94624 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -3880,12 +3880,14 @@ compute-cb@3 {
compatible = "qcom,fastrpc-compute-cb";
reg = <3>;
iommus = <&apps_smmu 0x1803 0x0>;
+ dma-coherent;
};
compute-cb@4 {
compatible = "qcom,fastrpc-compute-cb";
reg = <4>;
iommus = <&apps_smmu 0x1804 0x0>;
+ dma-coherent;
};
compute-cb@5 {
@@ -3893,6 +3895,7 @@ compute-cb@5 {
reg = <5>;
iommus = <&apps_smmu 0x1805 0x0>;
qcom,nsessions = <5>;
+ dma-coherent;
};
};
};
@@ -4120,6 +4123,7 @@ compute-cb@1 {
reg = <1>;
iommus = <&apps_smmu 0x11a1 0x0420>,
<&apps_smmu 0x1181 0x0420>;
+ dma-coherent;
};
compute-cb@2 {
@@ -4127,6 +4131,7 @@ compute-cb@2 {
reg = <2>;
iommus = <&apps_smmu 0x11a2 0x0420>,
<&apps_smmu 0x1182 0x0420>;
+ dma-coherent;
};
compute-cb@3 {
@@ -4134,6 +4139,7 @@ compute-cb@3 {
reg = <3>;
iommus = <&apps_smmu 0x11a3 0x0420>,
<&apps_smmu 0x1183 0x0420>;
+ dma-coherent;
};
compute-cb@4 {
@@ -4141,6 +4147,7 @@ compute-cb@4 {
reg = <4>;
iommus = <&apps_smmu 0x11a4 0x0420>,
<&apps_smmu 0x1184 0x0420>;
+ dma-coherent;
};
compute-cb@5 {
@@ -4148,6 +4155,7 @@ compute-cb@5 {
reg = <5>;
iommus = <&apps_smmu 0x11a5 0x0420>,
<&apps_smmu 0x1185 0x0420>;
+ dma-coherent;
};
compute-cb@6 {
@@ -4155,6 +4163,7 @@ compute-cb@6 {
reg = <6>;
iommus = <&apps_smmu 0x11a6 0x0420>,
<&apps_smmu 0x1186 0x0420>;
+ dma-coherent;
};
compute-cb@7 {
@@ -4162,6 +4171,7 @@ compute-cb@7 {
reg = <7>;
iommus = <&apps_smmu 0x11a7 0x0420>,
<&apps_smmu 0x1187 0x0420>;
+ dma-coherent;
};
compute-cb@8 {
@@ -4169,6 +4179,7 @@ compute-cb@8 {
reg = <8>;
iommus = <&apps_smmu 0x11a8 0x0420>,
<&apps_smmu 0x1188 0x0420>;
+ dma-coherent;
};
/* note: secure cb9 in downstream */
@@ -4178,6 +4189,7 @@ compute-cb@11 {
reg = <11>;
iommus = <&apps_smmu 0x11ab 0x0420>,
<&apps_smmu 0x118b 0x0420>;
+ dma-coherent;
};
compute-cb@12 {
@@ -4185,6 +4197,7 @@ compute-cb@12 {
reg = <12>;
iommus = <&apps_smmu 0x11ac 0x0420>,
<&apps_smmu 0x118c 0x0420>;
+ dma-coherent;
};
compute-cb@13 {
@@ -4192,6 +4205,7 @@ compute-cb@13 {
reg = <13>;
iommus = <&apps_smmu 0x11ad 0x0420>,
<&apps_smmu 0x118d 0x0420>;
+ dma-coherent;
};
compute-cb@14 {
@@ -4199,6 +4213,7 @@ compute-cb@14 {
reg = <14>;
iommus = <&apps_smmu 0x11ae 0x0420>,
<&apps_smmu 0x118e 0x0420>;
+ dma-coherent;
};
};
};
--
2.34.1
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