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Message-ID: <CAMj1kXGChWHhbfjUgTQ37+epLjivrKhV8unwyZCHvNTJL2f57w@mail.gmail.com>
Date: Wed, 14 May 2025 09:14:56 +0100
From: Ard Biesheuvel <ardb@...nel.org>
To: Ingo Molnar <mingo@...nel.org>
Cc: "Kirill A. Shutemov" <kirill@...temov.name>, Ard Biesheuvel <ardb+git@...gle.com>,
linux-kernel@...r.kernel.org, x86@...nel.org,
Linus Torvalds <torvalds@...ux-foundation.org>
Subject: Re: [RFC PATCH v2 2/6] x86/cpu: Use a new feature flag for 5 level paging
On Wed, 14 May 2025 at 09:04, Ingo Molnar <mingo@...nel.org> wrote:
>
>
> * Kirill A. Shutemov <kirill@...temov.name> wrote:
>
> > On Tue, May 13, 2025 at 01:12:00PM +0200, Ard Biesheuvel wrote:
> > > From: Ard Biesheuvel <ardb@...nel.org>
> > >
> > > Currently, the LA57 CPU feature flag is taken to mean two different
> > > things at once:
> > > - whether the CPU implements the LA57 extension, and is therefore
> > > capable of supporting 5 level paging;
> > > - whether 5 level paging is currently in use.
> > >
> > > This means the LA57 capability of the hardware is hidden when a LA57
> > > capable CPU is forced to run with 4 levels of paging. It also means the
> > > the ordinary CPU capability detection code will happily set the LA57
> > > capability and it needs to be cleared explicitly afterwards to avoid
> > > inconsistencies.
> > >
> > > Separate the two so that the CPU hardware capability can be identified
> > > unambigously in all cases.
> >
> > Unfortunately, there's already userspace that use la57 flag in
> > /proc/cpuinfo as indication that 5-level paging is active. :/
> >
> > See va_high_addr_switch.sh in kernel selftests for instance.
>
> Kernel selftests do not really count if that's the only userspace that
> does this - but they indeed increase the likelihood that some external
> userspace uses /proc/cpuinfo in that fashion. Does such external
> user-space code exist?
>
Bah, that seems likely if this is the only way user space is able to
infer that the kernel is using 5-level paging.
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