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Message-ID: <aCRVSaNVH6waid4c@gmail.com>
Date: Wed, 14 May 2025 10:33:13 +0200
From: Ingo Molnar <mingo@...nel.org>
To: "Kirill A. Shutemov" <kirill@...temov.name>
Cc: Ard Biesheuvel <ardb+git@...gle.com>, linux-kernel@...r.kernel.org,
x86@...nel.org, Ard Biesheuvel <ardb@...nel.org>,
Linus Torvalds <torvalds@...ux-foundation.org>
Subject: Re: [RFC PATCH v2 2/6] x86/cpu: Use a new feature flag for 5 level
paging
* Kirill A. Shutemov <kirill@...temov.name> wrote:
> On Wed, May 14, 2025 at 10:04:05AM +0200, Ingo Molnar wrote:
> >
> > * Kirill A. Shutemov <kirill@...temov.name> wrote:
> >
> > > On Tue, May 13, 2025 at 01:12:00PM +0200, Ard Biesheuvel wrote:
> > > > From: Ard Biesheuvel <ardb@...nel.org>
> > > >
> > > > Currently, the LA57 CPU feature flag is taken to mean two different
> > > > things at once:
> > > > - whether the CPU implements the LA57 extension, and is therefore
> > > > capable of supporting 5 level paging;
> > > > - whether 5 level paging is currently in use.
> > > >
> > > > This means the LA57 capability of the hardware is hidden when a LA57
> > > > capable CPU is forced to run with 4 levels of paging. It also means the
> > > > the ordinary CPU capability detection code will happily set the LA57
> > > > capability and it needs to be cleared explicitly afterwards to avoid
> > > > inconsistencies.
> > > >
> > > > Separate the two so that the CPU hardware capability can be identified
> > > > unambigously in all cases.
> > >
> > > Unfortunately, there's already userspace that use la57 flag in
> > > /proc/cpuinfo as indication that 5-level paging is active. :/
> > >
> > > See va_high_addr_switch.sh in kernel selftests for instance.
> >
> > Kernel selftests do not really count if that's the only userspace that
> > does this - but they indeed increase the likelihood that some external
> > userspace uses /proc/cpuinfo in that fashion. Does such external
> > user-space code exist?
>
> I am not aware of any production code that does this. But changing is
> risky.
Would production code ever really care about this?
> Maybe leave "la57" flag in cpuinfo for 5-level paging enabled case and add
> "la57_enumerated" or "la57_capable" to indicate that the hardware supports
> 5-level paging?
Yeah, see my other mail, I think renaming X86_FEATURE_LA57 to
X86_FEATURE_LA57_HW and exposing it as an additional 'la57_hw' flag in
/proc/cpuinfo would be the way to go, if this is a compatibility
concern.
Thanks,
Ingo
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