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Message-ID: <20250514095350.3765716-7-ben717@andestech.com>
Date: Wed, 14 May 2025 17:53:47 +0800
From: Ben Zong-You Xie <ben717@...estech.com>
To:
CC: <paul.walmsley@...ive.com>, <palmer@...belt.com>, <aou@...s.berkeley.edu>,
<alex@...ti.fr>, <robh@...nel.org>, <krzk+dt@...nel.org>,
<conor+dt@...nel.org>, <tglx@...utronix.de>,
<daniel.lezcano@...aro.org>, <prabhakar.mahadev-lad.rj@...renesas.com>,
<geert+renesas@...der.be>, <magnus.damm@...il.com>,
<devicetree@...r.kernel.org>, <linux-riscv@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <tim609@...estech.com>,
Ben Zong-You Xie <ben717@...estech.com>
Subject: [PATCH v4 6/9] dt-bindings: cache: add QiLai compatible to ax45mp
Add a new compatible string for ax45mp-cache on QiLai SoC.
Also, add allOf constraints to enforce specific cache-sets and cache-size
values for qilai-ax45mp-cache.
Signed-off-by: Ben Zong-You Xie <ben717@...estech.com>
---
.../bindings/cache/andestech,ax45mp-cache.yaml | 18 +++++++++++++++++-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml b/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml
index df8bba14f758..cd08ea57b2d9 100644
--- a/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml
+++ b/Documentation/devicetree/bindings/cache/andestech,ax45mp-cache.yaml
@@ -28,7 +28,9 @@ select:
properties:
compatible:
items:
- - const: renesas,r9a07g043f-ax45mp-cache
+ - enum:
+ - andestech,qilai-ax45mp-cache
+ - renesas,r9a07g043f-ax45mp-cache
- const: andestech,ax45mp-cache
- const: cache
@@ -66,6 +68,20 @@ required:
- cache-size
- cache-unified
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: andestech,qilai-ax45mp-cache
+
+ then:
+ properties:
+ cache-sets:
+ const: 2048
+ cache-size:
+ const: 2097152
+
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
--
2.34.1
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