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Message-ID: <20250515131120.GCaCXn-E8zQutUqKLn@fat_crate.local>
Date: Thu, 15 May 2025 15:11:20 +0200
From: Borislav Petkov <bp@...en8.de>
To: Ard Biesheuvel <ardb+git@...gle.com>, Shivank Garg <shivankg@....com>
Cc: linux-kernel@...r.kernel.org, x86@...nel.org,
	Ard Biesheuvel <ardb@...nel.org>, Ingo Molnar <mingo@...nel.org>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	Brian Gerst <brgerst@...il.com>,
	"Rao, Bharata Bhasker" <bharata@....com>
Subject: Re: [PATCH v3 1/7] x86/cpu: Use a new feature flag for 5 level paging

On Wed, May 14, 2025 at 12:42:44PM +0200, Ard Biesheuvel wrote:
> From: Ard Biesheuvel <ardb@...nel.org>
> 
> Currently, the LA57 CPU feature flag is taken to mean two different
> things at once:
> - whether the CPU implements the LA57 extension, and is therefore
>   capable of supporting 5 level paging;
> - whether 5 level paging is currently in use.

Btw, that gunk:

We had started simplifying the whole 5-level crap:

https://lore.kernel.org/all/20240621164406.256314-1-kirill.shutemov@linux.intel.com/

Shivank, I hear the performance issues got resolved in the meantime?

Thx.

-- 
Regards/Gruss,
    Boris.

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