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Message-ID: <20250515143723.2450630-4-rkrcmar@ventanamicro.com> Date: Thu, 15 May 2025 16:37:24 +0200 From: Radim Krčmář <rkrcmar@...tanamicro.com> To: kvm-riscv@...ts.infradead.org Cc: kvm@...r.kernel.org, linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org, Anup Patel <anup@...infault.org>, Atish Patra <atishp@...shpatra.org>, Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>, Alexandre Ghiti <alex@...ti.fr>, Andrew Jones <ajones@...tanamicro.com> Subject: [PATCH v3 0/2] RISC-V: KVM: VCPU reset fixes Hello, the design still requires a discussion. [v3 1/2] removes most of the additional changes that the KVM capability was doing in v2. [v3 2/2] is new and previews a general solution to the lack of userspace control over KVM SBI. A possible QEMU implementation for both capabilities can be seen in https://github.com/radimkrcmar/qemu/tree/reset_fixes_v3 The next step would be to forward the HSM ecalls to QEMU. v2: https://lore.kernel.org/kvm-riscv/20250508142842.1496099-2-rkrcmar@ventanamicro.com/ v1: https://lore.kernel.org/kvm-riscv/20250403112522.1566629-3-rkrcmar@ventanamicro.com/ Radim Krčmář (2): RISC-V: KVM: add KVM_CAP_RISCV_MP_STATE_RESET RISC-V: KVM: add KVM_CAP_RISCV_USERSPACE_SBI Documentation/virt/kvm/api.rst | 22 ++++++++++++++++++++++ arch/riscv/include/asm/kvm_host.h | 6 ++++++ arch/riscv/include/asm/kvm_vcpu_sbi.h | 1 + arch/riscv/kvm/vcpu.c | 27 ++++++++++++++------------- arch/riscv/kvm/vcpu_sbi.c | 27 +++++++++++++++++++++++++-- arch/riscv/kvm/vm.c | 18 ++++++++++++++++++ include/uapi/linux/kvm.h | 2 ++ 7 files changed, 88 insertions(+), 15 deletions(-) -- 2.49.0
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