[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <aCYH0UQzO_Ek27js@gmail.com>
Date: Thu, 15 May 2025 17:27:13 +0200
From: Ingo Molnar <mingo@...nel.org>
To: "Xin Li (Intel)" <xin@...or.com>
Cc: linux-kernel@...r.kernel.org, xen-devel@...ts.xenproject.org,
linux-acpi@...r.kernel.org, tglx@...utronix.de, bp@...en8.de,
dave.hansen@...ux.intel.com, x86@...nel.org, hpa@...or.com,
peterz@...radead.org, jgross@...e.com, boris.ostrovsky@...cle.com,
rafael@...nel.org, lenb@...nel.org
Subject: Re: [PATCH v1 3/3] x86/msr: Convert a native_wrmsr() use to
native_wrmsrq()
* Xin Li (Intel) <xin@...or.com> wrote:
> Convert a native_wrmsr() use to native_wrmsrq() to zap meaningless type
> conversions when a u64 MSR value is splitted into two u32.
>
> Signed-off-by: Xin Li (Intel) <xin@...or.com>
> ---
> arch/x86/coco/sev/core.c | 7 +------
> 1 file changed, 1 insertion(+), 6 deletions(-)
>
> diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c
> index ff82151f7718..b3ce6fc8b62d 100644
> --- a/arch/x86/coco/sev/core.c
> +++ b/arch/x86/coco/sev/core.c
> @@ -282,12 +282,7 @@ static inline u64 sev_es_rd_ghcb_msr(void)
>
> static __always_inline void sev_es_wr_ghcb_msr(u64 val)
> {
> - u32 low, high;
> -
> - low = (u32)(val);
> - high = (u32)(val >> 32);
> -
> - native_wrmsr(MSR_AMD64_SEV_ES_GHCB, low, high);
> + native_wrmsrq(MSR_AMD64_SEV_ES_GHCB, val);
BTW., at this point we should probably just replace
sev_es_wr_ghcb_msr() calls with direct calls to:
native_wrmsrq(MSR_AMD64_SEV_ES_GHCB, ...);
as sev_es_wr_ghcb_msr() is now basically an open-coded native_wrmsrq().
Thanks,
Ingo
Powered by blists - more mailing lists