linux-kernel - Re: [PATCH v3 17/17] x86/mce: Restore poll settings after storm subsides

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Message-ID: <20250515154708.GA19721@yaz-khff2.amd.com>
Date: Thu, 15 May 2025 11:47:08 -0400
From: Yazen Ghannam <yazen.ghannam@....com>
To: Borislav Petkov <bp@...en8.de>
Cc: "Luck, Tony" <tony.luck@...el.com>, "x86@...nel.org" <x86@...nel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-edac@...r.kernel.org" <linux-edac@...r.kernel.org>,
	"Smita.KoralahalliChannabasappa@....com" <Smita.KoralahalliChannabasappa@....com>,
	"Zhuo, Qiuxu" <qiuxu.zhuo@...el.com>
Subject: Re: [PATCH v3 17/17] x86/mce: Restore poll settings after storm
 subsides

On Thu, May 15, 2025 at 02:37:08PM +0200, Borislav Petkov wrote:
> On Wed, May 14, 2025 at 10:34:16AM -0400, Yazen Ghannam wrote:
> > On AMD, MCA bank management is always 'local', i.e. per-CPU.
> > 
> > If a CPU is in the polling function, can it be preempted by an interrupt
> > (not MCE)?
> 
> Well, ofc. We're polling with interrupts enabled.
> 

Right.

The polling function is called from a timer. I expect the timer is
checked during a timer tick or during rescheduling.

Even though these events are interrupt-driven, it doesn't make sense to
stay in interrupt context the whole time. I think this is where my
thoughts were.

So there's a slight change of double counting errors if the polling
function is interrupted between reading MCA_STATUS in a bank and
clearing it.

Thanks,
Yazen