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Message-ID: <aCVbpNkyHlfg+vc7@atctrx.andestech.com>
Date: Thu, 15 May 2025 11:12:36 +0800
From: Ben Zong-You Xie <ben717@...estech.com>
To: Rob Herring <robh@...nel.org>
CC: <paul.walmsley@...ive.com>, <palmer@...belt.com>, <aou@...s.berkeley.edu>,
<alex@...ti.fr>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
<tglx@...utronix.de>, <daniel.lezcano@...aro.org>,
<prabhakar.mahadev-lad.rj@...renesas.com>, <geert+renesas@...der.be>,
<magnus.damm@...il.com>, <devicetree@...r.kernel.org>,
<linux-riscv@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
<tim609@...estech.com>, Conor Dooley <conor.dooley@...rochip.com>
Subject: Re: [PATCH v4 4/9] dt-bindings: interrupt-controller: add Andes
machine-level software interrupt controller
On Wed, May 14, 2025 at 10:01:02AM -0500, Rob Herring wrote:
> [EXTERNAL MAIL]
>
> On Wed, May 14, 2025 at 05:53:45PM +0800, Ben Zong-You Xie wrote:
> > Add the DT binding documentation for Andes machine-level software
> > interrupt controller.
> >
> > In the Andes platform such as QiLai SoC, the PLIC module is instantiated a
> > second time with all interrupt sources tied to zero as the software
> > interrupt controller (PLICSW). PLICSW can generate machine-level software
> > interrupts through programming its registers.
> >
> > Acked-by: Conor Dooley <conor.dooley@...rochip.com>
> > Signed-off-by: Ben Zong-You Xie <ben717@...estech.com>
> > ---
> > .../andestech,plicsw.yaml | 54 +++++++++++++++++++
> > MAINTAINERS | 1 +
>
> This won't apply for me due to MAINTAINERS conflict with this series. So
> apply the bindings patches with the dts files.
>
> Rob
The conflict is due to the second patch in this series not being applied.
Should I wait for that patch to be applied, or is there something specific
I can do to resolve the conflict?
Thanks,
Ben
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