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Message-ID: <586c877d-0d0a-48bf-9c55-97bd24e86638@linaro.org>
Date: Thu, 15 May 2025 13:20:42 +0100
From: James Clark <james.clark@...aro.org>
To: Mark Brown <broonie@...nel.org>
Cc: Vladimir Oltean <olteanv@...il.com>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Frank Li <Frank.Li@....com>,
 Chester Lin <chester62515@...il.com>, Matthias Brugger <mbrugger@...e.com>,
 Ghennadi Procopciuc <ghennadi.procopciuc@....nxp.com>,
 NXP S32 Linux Team <s32@....com>, Shawn Guo <shawnguo@...nel.org>,
 Sascha Hauer <s.hauer@...gutronix.de>,
 Pengutronix Kernel Team <kernel@...gutronix.de>,
 Fabio Estevam <festevam@...il.com>, larisa.grigore@....com, arnd@...aro.org,
 andrei.stefanescu@....com, dan.carpenter@...aro.org,
 linux-spi@...r.kernel.org, imx@...ts.linux.dev,
 linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, Andra-Teodora Ilie
 <andra.ilie@....com>, Bogdan-Gabriel Roman <bogdan-gabriel.roman@....com>
Subject: Re: [PATCH 10/14] spi: spi-fsl-dspi: Enable modified transfer
 protocol



On 10/05/2025 02:18, Mark Brown wrote:
> On Fri, May 09, 2025 at 12:05:57PM +0100, James Clark wrote:
>> From: Andra-Teodora Ilie <andra.ilie@....com>
>>
>> Set MTFE bit in MCR register for frequencies higher than 25MHz.
> 
> Is this a bug fix?

Not this one as it's only supported for s32g which isn't enabled until 
later. The commit message is lacking though so I will elaborate.

For the other bug fixes it looks like they are, so I'll put them at the 
beginning and add fixes tags.

Thanks
James

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