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Message-Id: <20250516181754.7283-1-chath@bu.edu>
Date: Fri, 16 May 2025 18:17:54 +0000
From: Chathura Rajapaksha <chathura.abeyrathne.lk@...il.com>
To: jgg@...pe.ca
Cc: Yunxiang.Li@....com,
alex.williamson@...hat.com,
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Subject: Re: [RFC PATCH 0/2] vfio/pci: Block and audit accesses to unassigned config regions
Hi Jason and Alex,
Thank you for the comments, and apologies for the delayed response.
On Mon, Apr 28, 2025 at 9:24 AM
Jason Gunthorpe <jgg@...pe.ca> wrote:
> > Some PCIe devices trigger PCI bus errors when accesses are made to
> > unassigned regions within their PCI configuration space. On certain
> > platforms, this can lead to host system hangs or reboots.
>
> Do you have an example of this? What do you mean by bus error?
By PCI bus error, I was referring to AER-reported uncorrectable errors.
For example:
pcieport 0000:c0:01.1: PCIe Bus Error: severity=Uncorrected (Fatal), type=Transaction Layer, (Requester ID)
pcieport 0000:c0:01.1: device [1022:1483] error status/mask=00004000/07a10000
pcieport 0000:c0:01.1: [14] CmpltTO (First)
In another case, with a different device on a separate system, we
observed an uncorrectable machine check exception:
mce: [Hardware Error]: CPU 10: Machine Check Exception: 5 Bank 6: fb80000000000e0b
> I would expect the device to return some constant like 0, or to return
> an error TLP. The host bridge should convert the error TLP to
> 0XFFFFFFF like all other read error conversions.
>
> Is it a device problem or host bridge problem you are facing?
We haven’t been able to confirm definitively whether it’s a device or
host bridge issue due to limited visibility into platform internals.
However, we suspect it’s device-specific, as the same device triggered
similar failures across two different systems when writing to a
specific unassigned region in its config space. That said, we haven’t
exhaustively tested across devices and platforms.
If you have suggestions for identifying whether this stems from the
device or host bridge, we’d appreciate the guidance.
On Mon, Apr 28, 2025 at 4:26 PM
Alex Williamson <alex.williamson@...hat.com> wrote:
> Or system problem. Is it the access itself that generates a problem or
> is it what the device does as a result of the access? If the latter,
> does this only remove a config space fuzzing attack vector against that
> behavior or do we expect the device cannot generate the same behavior
> via MMIO or IO register accesses?
Unfortunately, we can't say for certain whether the fault lies in the
access itself or in the device's response. The cloud environments we
tested on don’t provide sufficient low-level hardware insight to
determine that. Please let me know if you have any pointers on how to
determine this at the kernel level.
This patch specifically aims to eliminate the config space fuzzing
vector. We have not investigated whether similar behavior can be
triggered through MMIO or IO register accesses.
> > No module parameters please.
> >
> > At worst the kernel should maintain a quirks list to control this,
> > maybe with a sysfs to update it.
>
> No module parameters might be difficult if we end up managing this as a
> default policy selection, but certainly agree that if we get into
> device specific behaviors we probably want those quirks automatically
> deployed by the kernel. Thanks,
We used module parameters to give the flexibility to block unassigned
config space accesses on specific devices, especially in cases where new
problematic devices might emerge.
Is it feasible to support such use cases using a quirk-based mechanism?
For example, could we implement a quirk table that’s updateable via
sysfs, as you suggested?
Thank you for your time, and again, apologies for the delayed response.
Thanks,
Chathura
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