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Message-ID: <cover.1747368554.git.adrianhoyin.ng@altera.com>
Date: Fri, 16 May 2025 12:13:31 +0800
From: adrianhoyin.ng@...era.com
To: dinguyen@...nel.org,
	robh@...nel.org,
	krzk+dt@...nel.org,
	conor+dt@...nel.org,
	maz@...nel.org,
	tglx@...utronix.de,
	linux-arm-kernel@...ts.infradead.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Cc: adrianhoyin.ng@...era.com
Subject: [PATCH 0/3] Add quirk to support address bus size limitation

From: Adrian Ng Ho Yin <adrianhoyin.ng@...era.com>

This patch set adds support for the address bus size limitation by
allocating buffers with in a 32 bit address range.

-Add device tree binding to enable a quirk to support a limited address
bus size.
-Update ITS node for Agilex5 with dma_32bit_quirk.
-Add implementation to configure gfp flags to allocate buffers within
32 bit addressable range when quirk is set.

Adrian Ng Ho Yin (3):
  dt-bindings: interrupt-controller: arm,gic-v3-its: Add quirk to
    support 32 bit addressable range
  arm64: dts: socfpga: agilex5: Add dma_32bit_quirk in GIC ITS node
  irqchip: gic-v3-its: add support for 32bit addressing

 .../interrupt-controller/arm,gic-v3.yaml      |  5 ++++
 .../arm64/boot/dts/intel/socfpga_agilex5.dtsi |  1 +
 drivers/irqchip/irq-gic-v3-its.c              | 23 +++++++++++++++----
 3 files changed, 25 insertions(+), 4 deletions(-)

-- 
2.49.GIT


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