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Message-ID: <7673cb4e-b359-be7c-27db-639f208e3835@oss.qualcomm.com>
Date: Fri, 16 May 2025 18:19:36 +0530
From: Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Cc: Bjorn Helgaas <bhelgaas@...gle.com>,
Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>,
Jingoo Han <jingoohan1@...il.com>,
Lorenzo Pieralisi
<lpieralisi@...nel.org>,
Krzysztof Wilczyński
<kw@...ux.com>,
Rob Herring <robh@...nel.org>,
Johannes Berg <johannes@...solutions.net>,
Jeff Johnson
<jjohnson@...nel.org>, linux-pci@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
mhi@...ts.linux.dev, linux-wireless@...r.kernel.org,
ath11k@...ts.infradead.org, quic_pyarlaga@...cinc.com,
quic_vbadigan@...cinc.com, quic_vpernami@...cinc.com,
quic_mrana@...cinc.com, Jeff Johnson <jeff.johnson@....qualcomm.com>
Subject: Re: [PATCH v2 02/10] PCI/bwctrl: Add support to scale bandwidth
before & after link re-training
On 4/25/2025 9:27 PM, Manivannan Sadhasivam wrote:
> On Thu, Mar 13, 2025 at 05:10:09PM +0530, Krishna Chaitanya Chundru wrote:
>> If the driver wants to move to higher data rate/speed than the current data
>> rate then the controller driver may need to change certain votes so that
>> link may come up at requested data rate/speed like QCOM PCIe controllers
>> need to change their RPMh (Resource Power Manager-hardened) state. Once
>> link retraining is done controller drivers needs to adjust their votes
>> based on the final data rate.
>>
>> Some controllers also may need to update their bandwidth voting like
>> ICC bw votings etc.
>>
>> So, add pre_scale_bus_bw() & post_scale_bus_bw() op to call before & after
>> the link re-train. There is no explicit locking mechanisms as these are
>> called by a single client endpoint driver.
>>
>> In case of PCIe switch, if there is a request to change target speed for a
>> downstream port then no need to call these function ops as these are
>> outside the scope of the controller drivers.
>>
>> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
>> ---
>> drivers/pci/pcie/bwctrl.c | 15 +++++++++++++++
>> include/linux/pci.h | 13 +++++++++++++
>> 2 files changed, 28 insertions(+)
>>
>> diff --git a/drivers/pci/pcie/bwctrl.c b/drivers/pci/pcie/bwctrl.c
>> index 0a5e7efbce2c..b1d660359553 100644
>> --- a/drivers/pci/pcie/bwctrl.c
>> +++ b/drivers/pci/pcie/bwctrl.c
>> @@ -161,6 +161,8 @@ static int pcie_bwctrl_change_speed(struct pci_dev *port, u16 target_speed, bool
>> int pcie_set_target_speed(struct pci_dev *port, enum pci_bus_speed speed_req,
>> bool use_lt)
>> {
>> + struct pci_host_bridge *host = pci_find_host_bridge(port->bus);
>> + bool is_rootport = pci_is_root_bus(port->bus);
>
> s/rootport/rootbus
>
>> struct pci_bus *bus = port->subordinate;
>> u16 target_speed;
>> int ret;
>> @@ -173,6 +175,16 @@ int pcie_set_target_speed(struct pci_dev *port, enum pci_bus_speed speed_req,
>>
>> target_speed = pcie_bwctrl_select_speed(port, speed_req);
>>
>> + /*
>> + * The controller driver may need to be scaled for targeted speed
>
> s/controller/host bridge
>
>> + * otherwise link might not come up at requested speed.
>> + */
>> + if (is_rootport && host->ops->pre_scale_bus_bw) {
>> + ret = host->ops->pre_scale_bus_bw(host->bus, target_speed);
>> + if (ret)
>> + return ret;
>> + }
>> +
>> scoped_guard(rwsem_read, &pcie_bwctrl_setspeed_rwsem) {
>> struct pcie_bwctrl_data *data = port->link_bwctrl;
>>
>> @@ -197,6 +209,9 @@ int pcie_set_target_speed(struct pci_dev *port, enum pci_bus_speed speed_req,
>> !list_empty(&bus->devices))
>> ret = -EAGAIN;
>>
>> + if (is_rootport && host->ops->post_scale_bus_bw)
>> + host->ops->post_scale_bus_bw(host->bus, pci_bus_speed2lnkctl2(bus->cur_bus_speed));
>> +
>> return ret;
>> }
>>
>> diff --git a/include/linux/pci.h b/include/linux/pci.h
>> index 47b31ad724fa..9ae199c1e698 100644
>> --- a/include/linux/pci.h
>> +++ b/include/linux/pci.h
>> @@ -804,6 +804,19 @@ struct pci_ops {
>> void __iomem *(*map_bus)(struct pci_bus *bus, unsigned int devfn, int where);
>> int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
>> int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
>> + /*
>> + * Callback to the drivers to update ICC bw votes, clock frequencies etc for
>
> s/drivers/host bridge drivers/
>
>> + * the link re-train to come up in targeted speed. These are called by a single
>> + * client endpoint driver, so there is no need for explicit locking mechanisms.
>
> You need to mention that these ops are meant to be called by devices attached
> to the root port.
>
Ack.
As these are bridge driver specific ops, it feels to me we need to add
these in the host bridge driver similar to recently added one
reset_slot, I will move it in the next series.
- Krishna Chaitanya.
> - Mani
>
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