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Message-Id: <EAEB5A61-F19B-481C-B6F0-49B3D509B70A@zytor.com>
Date: Sat, 17 May 2025 00:26:32 -0700
From: Xin Li <xin@...or.com>
To: Molnar Ingo <mingo@...nel.org>
Cc: linux-kernel@...r.kernel.org, xen-devel@...ts.xenproject.org,
linux-acpi@...r.kernel.org, tglx@...utronix.de, bp@...en8.de,
dave.hansen@...ux.intel.com, x86@...nel.org, hpa@...or.com,
peterz@...radead.org, jgross@...e.com, boris.ostrovsky@...cle.com,
rafael@...nel.org, lenb@...nel.org
Subject: Re: [PATCH v1 3/3] x86/msr: Convert a native_wrmsr() use to native_wrmsrq()
>>> On 5/15/2025 10:54 AM, Xin Li wrote:
>>> On 5/15/2025 8:27 AM, Ingo Molnar wrote:
>>>>
>>>> * Xin Li (Intel) <xin@...or.com> wrote:
>>>>
>>>>> Convert a native_wrmsr() use to native_wrmsrq() to zap meaningless type
>>>>> conversions when a u64 MSR value is splitted into two u32.
>>>>>
>>>>
>>>> BTW., at this point we should probably just replace
>>>> sev_es_wr_ghcb_msr() calls with direct calls to:
>>>>
>>>> native_wrmsrq(MSR_AMD64_SEV_ES_GHCB, ...);
>>>>
>>>> as sev_es_wr_ghcb_msr() is now basically an open-coded native_wrmsrq().
>>>>
>>>
>>> I thought about it, however it looks to me that current code prefers not
>>> to spread MSR_AMD64_SEV_ES_GHCB in 17 callsites. And anyway it's a
>>> __always_inline function.
>>>
>>> But as you have asked, I will make the change unless someone objects.
>>
>> Hi Ingo,
>>
>> I took a further look and found that we can't simply replace
>> sev_es_wr_ghcb_msr() with native_wrmsrq(MSR_AMD64_SEV_ES_GHCB, ...).
>>
>> There are two sev_es_wr_ghcb_msr() definitions. One is defined in
>> arch/x86/boot/compressed/sev.h and it references boot_wrmsr() defined in
>> arch/x86/boot/msr.h to do MSR write.
>
> Ah, indeed, it's also a startup code wrapper, which wrmsrq() doesn't
> have at the moment. Fair enough.
So you want me to drop this patch then?
Thanks!
Xin
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