[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20250517095947.GAaCheE9tUvgSWMhpa@fat_crate.local>
Date: Sat, 17 May 2025 11:59:47 +0200
From: Borislav Petkov <bp@...en8.de>
To: "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
Cc: Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>,
Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org,
"H. Peter Anvin" <hpa@...or.com>, Jonathan Corbet <corbet@....net>,
Andy Lutomirski <luto@...nel.org>,
Peter Zijlstra <peterz@...radead.org>,
Ard Biesheuvel <ardb@...nel.org>,
Jan Kiszka <jan.kiszka@...mens.com>,
Kieran Bingham <kbingham@...nel.org>,
Michael Roth <michael.roth@....com>,
Rick Edgecombe <rick.p.edgecombe@...el.com>,
Brijesh Singh <brijesh.singh@....com>,
Sandipan Das <sandipan.das@....com>,
Juergen Gross <jgross@...e.com>,
Tom Lendacky <thomas.lendacky@....com>,
linux-kernel@...r.kernel.org, linux-doc@...r.kernel.org,
linux-efi@...r.kernel.org, linux-mm@...ck.org
Subject: Re: [PATCHv3 0/4] x86: Make 5-level paging support unconditional for
x86-64
On Fri, May 16, 2025 at 03:33:02PM +0300, Kirill A. Shutemov wrote:
> Both Intel and AMD CPUs support 5-level paging, which is expected to
> become more widely adopted in the future.
>
> Remove CONFIG_X86_5LEVEL.
>
> In preparation to that remove CONFIG_DYNAMIC_MEMORY_LAYOUT and make
> SPARSEMEM_VMEMMAP the only memory model.
>
> v3:
> - Drop few "#if CONFIG_PGTABLE_LEVELS >= 5";
> - Make PARAVIRT_XXL 64-bit explicitly and drop ifdefs
> to support PGTABLE_LEVELS < 5;
> - Add Reviewed-by tags from Ard;
> v2:
> - Fix 32-bit build by wrapping p4d_set_huge() and p4d_clear_huge() in
> #if CONFIG_PGTABLE_LEVELS > 4;
> - Rebased onto current tip/master;
>
> Kirill A. Shutemov (4):
> x86/64/mm: Always use dynamic memory layout
> x86/64/mm: Make SPARSEMEM_VMEMMAP the only memory model
> x86/64/mm: Make 5-level paging support unconditional
> x86/paravirt: Restrict PARAVIRT_XXL to 64-bit only
The whole set passed randbuilds testing here too, and am running boot tests on
my pile of stinky hw.
If it passes, we could queue it all.
Thx.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
Powered by blists - more mailing lists