linux-kernel - Re: [PATCH 1/2] dt-bindings: stm32: add STM32MP21 clocks and reset bindings

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Message-ID: <83ce3ca8-c014-4814-8c51-9f7fd5151a41@oracle.com>
Date: Mon, 19 May 2025 20:12:36 +0530
From: ALOK TIWARI <alok.a.tiwari@...cle.com>
To: gabriel.fernandez@...s.st.com,
        Michael Turquette
 <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Maxime Coquelin <mcoquelin.stm32@...il.com>,
        Alexandre Torgue <alexandre.torgue@...s.st.com>,
        Philipp Zabel <p.zabel@...gutronix.de>
Cc: linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
        linux-stm32@...md-mailman.stormreply.com,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Nicolas Le Bayon <nicolas.le.bayon@...com>
Subject: Re: [PATCH 1/2] dt-bindings: stm32: add STM32MP21 clocks and reset
 bindings


> +++ b/Documentation/devicetree/bindings/clock/st,stm32mp21-rcc.yaml
> @@ -0,0 +1,200 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: https://urldefense.com/v3/__http://devicetree.org/schemas/clock/st,stm32mp21-rcc.yaml*__;Iw!!ACWV5N9M2RV99hQ!Nqfcj0yvl-cb4Mu6XFbLz7FVSHkQfpdQGRbVtM1EqANq9n_cdZZNBg-YGSqb-Nkm16LDOQ7TsRAIi2iDug6DIO8uPU0kq3E$
> +$schema: https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!ACWV5N9M2RV99hQ!Nqfcj0yvl-cb4Mu6XFbLz7FVSHkQfpdQGRbVtM1EqANq9n_cdZZNBg-YGSqb-Nkm16LDOQ7TsRAIi2iDug6DIO8uLNFOSgg$
> +
> +title: STM32MP21 Reset Clock Controller
> +
> +maintainers:
> +  - Gabriel Fernandez <gabriel.fernandez@...s.st.com>
> +
> +description: |
> +  The RCC hardware block is both a reset and a clock controller.
> +  RCC makes also power management (resume/supend).

typo supend

> +
> +  See also::
> +    include/dt-bindings/clock/st,stm32mp21-rcc.h
> +    include/dt-bindings/reset/st,stm32mp21-rcc.h
> +
[clip]
> +      - description: CK_SCMI_ICN_APB2 Peripheral bridge 2
> +      - description: CK_SCMI_ICN_APB3 Peripheral bridge 3
> +      - description: CK_SCMI_ICN_APB4 Peripheral bridge 4
> +      - description: CK_SCMI_ICN_APB5 Peripheral bridge 5
> +      - description: CK_SCMI_ICN_APBDBG Peripheral bridge for degub

typo degub

> +      - description: CK_SCMI_TIMG1 Peripheral bridge for timer1
> +      - description: CK_SCMI_TIMG2 Peripheral bridge for timer2

Thanks,
Alok