linux-kernel - Re: [PATCH] MIPS: CPS: Optimise delay CPU calibration for SMP

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Message-Id: <8c4ef90e-82db-4711-a5f3-446bcca00e9d@app.fastmail.com>
Date: Tue, 20 May 2025 16:35:42 +0100
From: "Jiaxun Yang" <jiaxun.yang@...goat.com>
To: "Gregory CLEMENT" <gregory.clement@...tlin.com>,
 "Thomas Bogendoerfer" <tsbogend@...ha.franken.de>
Cc: "Vladimir Kondratiev" <vladimir.kondratiev@...ileye.com>,
 Théo Lebrun <theo.lebrun@...tlin.com>,
 "Tawfik Bayouk" <tawfik.bayouk@...ileye.com>,
 "Thomas Petazzoni" <thomas.petazzoni@...tlin.com>,
 "linux-mips@...r.kernel.org" <linux-mips@...r.kernel.org>,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH] MIPS: CPS: Optimise delay CPU calibration for SMP



在2025年5月20日周二 下午4:21，Gregory CLEMENT写道：
[...]
>
> This allows to implement calibrate_delay_is_known(), which will return
> 0 (triggering calibration) only for the primary CPU of each
> cluster. For other CPUs, we can simply reuse the value from their
> cluster's primary CPU core.

Is __cpu_primary_cluster_mask really necessary?

Maybe we can just test if current CPU is the first powered up CPU
in the cluster?

Thanks
Jiaxun

>
> With the introduction of this patch, a configuration running 32 cores
> spread across two clusters sees a significant reduction in boot time
> by approximately 600 milliseconds.
>
> Signed-off-by: Gregory CLEMENT <gregory.clement@...tlin.com>
> ---
>  arch/mips/kernel/smp-cps.c | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
>
> diff --git a/arch/mips/kernel/smp-cps.c b/arch/mips/kernel/smp-cps.c
> index 
> 02bbd7ecd1b9557003186b9d3d98ae17eac5eb9f..93e01b90b4a21323c7629350211083a81eb549d4 
> 100644
> --- a/arch/mips/kernel/smp-cps.c
> +++ b/arch/mips/kernel/smp-cps.c
> @@ -40,6 +40,7 @@ static u64 core_entry_reg;
>  static phys_addr_t cps_vec_pa;
> 
>  struct cluster_boot_config *mips_cps_cluster_bootcfg;
> +struct cpumask __cpu_primary_cluster_mask __read_mostly;
> 
>  static void power_up_other_cluster(unsigned int cluster)
>  {
> @@ -225,6 +226,7 @@ static void __init cps_smp_setup(void)
>  		if (mips_cm_revision() >= CM_REV_CM3_5)
>  			power_up_other_cluster(cl);
> 
> +		cpumask_set_cpu(nvpes, &__cpu_primary_cluster_mask);
>  		ncores = mips_cps_numcores(cl);
>  		for (c = 0; c < ncores; c++) {
>  			core_vpes = core_vpe_count(cl, c);
> @@ -281,6 +283,24 @@ static void __init cps_smp_setup(void)
>  #endif /* CONFIG_MIPS_MT_FPAFF */
>  }
> 
> +unsigned long calibrate_delay_is_known(void)
> +{
> +	int i, this_cpu = smp_processor_id(), primary_cpu_cluster = 0;
> +
> +	/* The calibration has to be done on the primary CPU of the cluster */
> +	if (cpumask_test_cpu(this_cpu, &__cpu_primary_cluster_mask))
> +		return 0;
> +
> +	/* Look for the primary CPU of the cluster this CPU belongs to */
> +	for_each_cpu(i, &__cpu_primary_cluster_mask) {
> +		/* we reach the next cluster */
> +		if (i > this_cpu)
> +			break;
> +		primary_cpu_cluster = i;
> +	}
> +	return cpu_data[primary_cpu_cluster].udelay_val;
> +}
> +
>  static void __init cps_prepare_cpus(unsigned int max_cpus)
>  {
>  	unsigned int nclusters, ncores, core_vpes, c, cl, cca;
>
> ---
> base-commit: 3b3704261e851e25983860e4c352f1f73786f4ab
> change-id: 20250520-smp_calib-6d3009e1f5b9
>
> Best regards,
> -- 
> Grégory CLEMENT, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com

-- 
- Jiaxun