[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <898a2204-f129-44d0-9f73-74370524112c@oss.qualcomm.com>
Date: Tue, 20 May 2025 18:08:38 +0200
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Wenmeng Liu <quic_wenmliu@...cinc.com>, Robert Foss <rfoss@...nel.org>,
Todor Tomov <todor.too@...il.com>,
Bryan O'Donoghue <bryan.odonoghue@...aro.org>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>,
Vikram Sharma <quic_vikramsa@...cinc.com>,
Loic Poulain <loic.poulain@....qualcomm.com>,
Andi Shyti <andi.shyti@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, linux-media@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-i2c@...r.kernel.org
Subject: Re: [PATCH 3/4] arm64: dts: qcom: sa8775p: Add CCI definitions
On 5/14/25 4:40 AM, Wenmeng Liu wrote:
> Qualcomm SA8775P SoC contains 4 Camera Control Interface controllers.
>
> Signed-off-by: Wenmeng Liu <quic_wenmliu@...cinc.com>
> ---
> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 268 ++++++++++++++++++++++++++++++++++
> 1 file changed, 268 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> index 9a8f60db87b1afdf16cf55eb2e95f83eb45803a5..a867694b15b307344b72041e972bae6e7543a98f 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -3941,6 +3941,162 @@ videocc: clock-controller@...0000 {
> #power-domain-cells = <1>;
> };
>
> + cci0: cci@...3000 {
> + compatible = "qcom,sa8775p-cci", "qcom,msm8996-cci";
> + #address-cells = <1>;
> + #size-cells = <0>;
put these two above status, please
> +
> + reg = <0x0 0xac13000 0x0 0x1000>;
0x0ac13000 so that it's nicely paddded to 8 hex digits
> + interrupts = <GIC_SPI 460 IRQ_TYPE_EDGE_RISING>;
> + power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>;
> + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>,
> + <&camcc CAM_CC_SLOW_AHB_CLK_SRC>,
> + <&camcc CAM_CC_CPAS_AHB_CLK>,
> + <&camcc CAM_CC_CCI_0_CLK>,
> + <&camcc CAM_CC_CCI_0_CLK_SRC>;
Only CCI_0 and the SLOW_AHB clocks should be necessary
[...]
> + cci0_0_default: cci0-0-default-state {
> + pins = "gpio60", "gpio61";
> + function = "cci_i2c";
> + drive-strength = <2>;
> + bias-pull-up = <2200>;
Please set your editor's tab width to 8 spaces
Konrad
Powered by blists - more mailing lists