linux-kernel - Re: [PATCH v6 15/16] PCI/AER: Add ratelimits to PCI AER Documentation

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Message-ID: <75a3749b-36d9-467c-80a7-7e4a42e2f9b1@linux.intel.com>
Date: Mon, 19 May 2025 22:01:09 -0700
From: Sathyanarayanan Kuppuswamy <sathyanarayanan.kuppuswamy@...ux.intel.com>
To: Bjorn Helgaas <helgaas@...nel.org>, linux-pci@...r.kernel.org
Cc: Jon Pan-Doh <pandoh@...gle.com>,
 Karolina Stolarek <karolina.stolarek@...cle.com>,
 Martin Petersen <martin.petersen@...cle.com>,
 Ben Fuller <ben.fuller@...cle.com>, Drew Walton <drewwalton@...rosoft.com>,
 Anil Agrawal <anilagrawal@...a.com>, Tony Luck <tony.luck@...el.com>,
 Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>,
 Lukas Wunner <lukas@...ner.de>,
 Jonathan Cameron <Jonathan.Cameron@...wei.com>,
 Sargun Dhillon <sargun@...a.com>, "Paul E . McKenney" <paulmck@...nel.org>,
 Mahesh J Salgaonkar <mahesh@...ux.ibm.com>,
 Oliver O'Halloran <oohall@...il.com>, Kai-Heng Feng <kaihengf@...dia.com>,
 Keith Busch <kbusch@...nel.org>, Robert Richter <rrichter@....com>,
 Terry Bowman <terry.bowman@....com>, Shiju Jose <shiju.jose@...wei.com>,
 Dave Jiang <dave.jiang@...el.com>, linux-kernel@...r.kernel.org,
 linuxppc-dev@...ts.ozlabs.org, Bjorn Helgaas <bhelgaas@...gle.com>
Subject: Re: [PATCH v6 15/16] PCI/AER: Add ratelimits to PCI AER Documentation

On 5/19/25 2:35 PM, Bjorn Helgaas wrote:
> From: Jon Pan-Doh <pandoh@...gle.com>
>
> Add ratelimits section for rationale and defaults.
>
> Signed-off-by: Karolina Stolarek <karolina.stolarek@...cle.com>
> Signed-off-by: Jon Pan-Doh <pandoh@...gle.com>
> Signed-off-by: Bjorn Helgaas <bhelgaas@...gle.com>
> Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@...ux.intel.com>
> Acked-by: Paul E. McKenney <paulmck@...nel.org>
> ---
>   Documentation/PCI/pcieaer-howto.rst | 11 +++++++++++
>   1 file changed, 11 insertions(+)
>
> diff --git a/Documentation/PCI/pcieaer-howto.rst b/Documentation/PCI/pcieaer-howto.rst
> index f013f3b27c82..896d2a232a90 100644
> --- a/Documentation/PCI/pcieaer-howto.rst
> +++ b/Documentation/PCI/pcieaer-howto.rst
> @@ -85,6 +85,17 @@ In the example, 'Requester ID' means the ID of the device that sent
>   the error message to the Root Port. Please refer to PCIe specs for other
>   fields.
>   
> +AER Ratelimits
> +--------------
> +
> +Since error messages can be generated for each transaction, we may see
> +large volumes of errors reported. To prevent spammy devices from flooding
> +the console/stalling execution, messages are throttled by device and error
> +type (correctable vs. uncorrectable).

Can we list exceptions like DPC and FATAL errors (if added) ?

> +
> +AER uses the default ratelimit of DEFAULT_RATELIMIT_BURST (10 events) over
> +DEFAULT_RATELIMIT_INTERVAL (5 seconds).
> +
>   AER Statistics / Counters
>   -------------------------
>   

-- 
Sathyanarayanan Kuppuswamy
Linux Kernel Developer