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Message-ID: <aC0KdBdslZM8m2Ox@gondor.apana.org.au>
Date: Wed, 21 May 2025 07:04:20 +0800
From: Herbert Xu <herbert@...dor.apana.org.au>
To: Bharat Bhushan <bbhushan2@...vell.com>
Cc: bbrezillon@...nel.org, schalla@...vell.com, davem@...emloft.net,
giovanni.cabiddu@...el.com, linux@...blig.org,
bharatb.linux@...il.com, linux-crypto@...r.kernel.org,
linux-kernel@...r.kernel.org, stable@...r.kernel.org
Subject: Re: [PATCH 3/4 v2] crypto: octeontx2: Fix address alignment on CN10K
A0/A1 and OcteonTX2
On Tue, May 20, 2025 at 06:37:36PM +0530, Bharat Bhushan wrote:
>
> + info->in_buffer = PTR_ALIGN((u8 *)info + info_len,
> + OTX2_CPT_DPTR_RPTR_ALIGN);
Any address that's used for bidirectional or from-device DMA
needs to be aligned to ARCH_DMA_MINALIGN.
Sorry I missed this during the first round.
Cheers,
--
Email: Herbert Xu <herbert@...dor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
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