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Message-ID: <405accea-0b4c-4891-9022-425ddc886902@linaro.org>
Date: Tue, 20 May 2025 10:57:05 +0200
From: Neil Armstrong <neil.armstrong@...aro.org>
To: Michael Walle <mwalle@...nel.org>,
Jessica Zhang <quic_jesszhan@...cinc.com>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Thierry Reding
<thierry.reding@...il.com>, Sam Ravnborg <sam@...nborg.org>
Cc: dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH 2/2] drm/panel-simple: add AUO P238HAN01 panel entry
On 20/05/2025 09:44, Michael Walle wrote:
> Timings taken from the datasheet and the display is working in DE mode,
> thus the datasheet only specifies the blanking period. sync, back porch
> and front porch are arbitrarily chosen.
>
> The datasheet can be found at [1] but for reference these are the
> relevant timings:
>
> sym | | min | typ | max | unit |
> ------|--------------+------+------+------+------+
> Tv | V period | 1094 | 1130 | 1836 | Th |
> | V active | 1080 | 1080 | 1080 | Th |
> | V blanking | 14 | 50 | 756 | Th |
> Fv | V frequency | 49 | 60 | 76 | Hz |
> Th | H period | 1000 | 1050 | 1678 | Tclk |
> | H active | 960 | 960 | 960 | Tclk |
> | H blanking | 40 | 90 | 718 | Tclk |
> Fh | H frequency | 53.7 | 67.8 | 90.0 | kHz |
> Tclk | LVDS clock | 53.7 | 71.2 | 90.0 | MHz |
>
> Keep in mind that this is a dual link LVDS panel and the horizontal
> timings are only for one half of the panel.
>
> [1] https://www.fortec-integrated.de/fileadmin/pdf/produkte/TFT-Displays/AUO/P238HAN01.0_Datasheet.pdf
>
> Signed-off-by: Michael Walle <mwalle@...nel.org>
> ---
> drivers/gpu/drm/panel/panel-simple.c | 27 +++++++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
> index 0a3b26bb4d73..47222d2d8129 100644
> --- a/drivers/gpu/drm/panel/panel-simple.c
> +++ b/drivers/gpu/drm/panel/panel-simple.c
> @@ -1268,6 +1268,30 @@ static const struct panel_desc auo_g190ean01 = {
> .connector_type = DRM_MODE_CONNECTOR_LVDS,
> };
>
> +static const struct display_timing auo_p238han01_timings = {
> + .pixelclock = { 107400000, 142400000, 180000000 },
> + .hactive = { 1920, 1920, 1920 },
> + .hfront_porch = { 30, 70, 650 },
> + .hback_porch = { 30, 70, 650 },
> + .hsync_len = { 20, 40, 136 },
> + .vactive = { 1080, 1080, 1080 },
> + .vfront_porch = { 5, 19, 318 },
> + .vback_porch = { 5, 19, 318 },
> + .vsync_len = { 4, 12, 120 },
> +};
> +
> +static const struct panel_desc auo_p238han01 = {
> + .timings = &auo_p238han01_timings,
> + .num_timings = 1,
> + .bpc = 8,
> + .size = {
> + .width = 527,
> + .height = 296,
> + },
> + .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
> + .connector_type = DRM_MODE_CONNECTOR_LVDS,
> +};
> +
> static const struct display_timing auo_p320hvn03_timings = {
> .pixelclock = { 106000000, 148500000, 164000000 },
> .hactive = { 1920, 1920, 1920 },
> @@ -4938,6 +4962,9 @@ static const struct of_device_id platform_of_match[] = {
> }, {
> .compatible = "auo,g190ean01",
> .data = &auo_g190ean01,
> + }, {
> + .compatible = "auo,p238han01",
> + .data = &auo_p238han01,
> }, {
> .compatible = "auo,p320hvn03",
> .data = &auo_p320hvn03,
Reviewed-by: Neil Armstrong <neil.armstrong@...aro.org>
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