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Message-ID: <e0d25a68-057b-4839-a8cd-affe458bfea3@lunn.ch>
Date: Tue, 20 May 2025 02:15:45 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Jonas Gorski <jonas.gorski@...il.com>
Cc: Florian Fainelli <florian.fainelli@...adcom.com>,
Vladimir Oltean <olteanv@...il.com>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Vivien Didelot <vivien.didelot@...il.com>,
Álvaro Fernández Rojas <noltari@...il.com>,
Florian Fainelli <f.fainelli@...il.com>, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH net 2/3] net: dsa: b53: fix configuring RGMII delay on
bcm63xx
> Without this change no mode/port works, since there is always either a
> 0 ns delay or a 4 ns delay in the rx/tx paths (I assume, I have no
> equipment to measure).
>
> With this change all modes/ports work.
Which is wrong.
> With "rgmii-id" the mac doesn't
> configure any delays (and the phy does instead), with "rgmii" it's
> vice versa, so there is always the expected 2 ns delay. Same for rxid
> and txid.
If you read the description of what these four modes mean, you should
understand why only one should work. And given the most likely PCB
design, the only mode that should work is rgmii-id. You would have to
change the PCB design, to make the other modes work.
> The Switch is always integrated into the host SoC, so there is no
> (r)gmii cpu port to configure. There's basically directly attached DMA
> to/from the buffers of the cpu port. Not sure if there are even
> buffers, or if it is a direct to DMA delivery.
That makes it a lot simpler. It always plays the MAC side. So i
recommend you just hard code it no delay, and let the PHY add the
delays as needed.
Andrew
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