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Message-ID: <20250520130737.4181994-1-bbhushan2@marvell.com>
Date: Tue, 20 May 2025 18:37:33 +0530
From: Bharat Bhushan <bbhushan2@...vell.com>
To: <bbrezillon@...nel.org>, <schalla@...vell.com>,
<herbert@...dor.apana.org.au>, <davem@...emloft.net>,
<giovanni.cabiddu@...el.com>, <linux@...blig.org>,
<bharatb.linux@...il.com>, <linux-crypto@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
CC: Bharat Bhushan <bbhushan2@...vell.com>
Subject: [PATCH 0/4 v2]crypto: octeontx2: Fix hang and address alignment issues
First patch of the series fixes possible infinite loop.
Remaining three patches fixes address alignment issue observed
after "9382bc44b5f5 arm64: allow kmalloc() caches aligned to the
smaller cache_line_size()"
First 3 patches applies to Linux version 6.5 onwards.
Patch-4 applies to Linux version 6.8 onwards
v1->v2:
- Fixed memory padding size calculation as per review comment
Bharat Bhushan (4):
crypto: octeontx2: add timeout for load_fvc completion poll
crypto: octeontx2: Fix address alignment issue on ucode loading
crypto: octeontx2: Fix address alignment on CN10K A0/A1 and OcteonTX2
crypto: octeontx2: Fix address alignment on CN10KB and CN10KA-B0
.../marvell/octeontx2/otx2_cpt_reqmgr.h | 123 +++++++++++++-----
.../marvell/octeontx2/otx2_cptpf_ucode.c | 46 +++++--
2 files changed, 125 insertions(+), 44 deletions(-)
--
2.34.1
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